参数资料
型号: IR3550MTRPBF
厂商: International Rectifier
文件页数: 20/22页
文件大小: 0K
描述: IC DRIVER GATE 60A PQFN
标准包装: 1
系列: *
其它名称: IR3550MTRPBFDKR
STENCIL DESIGN
60A Integrated PowIRstage?
IR3550
? The stencil apertures for the lead lands should be
approximately 65% to 75% of the area of the lead
lands depending on stencil thickness. Reducing
the amount of solder deposited will minimize the
occurrence of lead shorts. Since for 0.5mm pitch
devices the leads are only 0.25mm wide, the
stencil apertures should not be made narrower;
openings in stencils < 0.25mm wide are difficult
to maintain repeatable solder release.
? The low power signal stencil lead land apertures
should therefore be shortened in length to keep
area ratio of 65% to 75% while centered on lead
land.
? The power pads VIN, PGND, TGND and SW, land
pad apertures should be approximately 65% to
75% area of solder on the center pad. If too much
solder is deposited on the center pad the part will
float and the lead lands will be open. Solder
paste on large pads is broken down into small
sections with a minimum gap of 0.2mm between
allowing for out-gassing during solder reflow.
? The maximum length and width of the land pad
stencil aperture should be equal to the solder
resist opening minus an annular 0.2mm pull back
to decrease the incidence of shorting the center
land to the lead lands when the part is pushed
into the solder paste.
Figure 35: Stencil design
* Contact International Rectifier to receive an electronic PCB Library file in Cadence Allegro or CAD DXF/DWG format.
20
March 12, 2012 | FINAL DATASHEET
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