参数资料
型号: IR3550MTRPBF
厂商: International Rectifier
文件页数: 4/22页
文件大小: 0K
描述: IC DRIVER GATE 60A PQFN
标准包装: 1
系列: *
其它名称: IR3550MTRPBFDKR
PIN DESCRIPTIONS
60A Integrated PowIRstage?
IR3550
PIN #
1
2
3
4, 16, 17
5, 32
6 – 15
18 – 23
24
25
26
27
28
29
30
31
PIN NAME
CSIN-
CSIN+
VCC
PGND
GATEL
SW
VIN
BOOST
PHSFLT#
PWM
BBRK#
LGND
REFIN
IOUT
TGND
PIN DESCRIPTION
Inverting input to the current sense amplifier. Connect to LGND if the current sense
amplifier is not used.
Non-Inverting input to the current sense amplifier. Connect to LGND if the current sense
amplifier is not used.
Bias voltage for control logic. Connect a minimum 1uF cap between VCC and PGND (pin
4) if current sense amplifier is used. Connect a minimum 0.1uF cap between VCC and
PGND (pin 4) if current sense amplifier is not used.
Power ground of MOSFET driver and the synchronous MOSFET. MOSFET driver signal is
referenced to this pin.
Low-side MOSFET driver pins that can be connected to a test point in order to observe
the waveform.
Switch node of synchronous buck converter.
High current input voltage connection. Recommended operating range is 4.5V to 15V.
Connect at least two 10uF 1206 ceramic capacitors and a 0.1uF 0402 ceramic capacitor.
Place the capacitors as close as possible to VIN pins and PGND pins (16-17). The 0.1uF
0402 capacitor should be on the same side of the PCB as the IR3550.
Bootstrap capacitor connection. The bootstrap capacitor provides the charge to turn on
the control MOSFET. Connect a minimum 0.22μF capacitor from BOOST to SW pin. Place
the capacitor as close to BOOST pin as possible and minimize the parasitic inductance of
the connection from the capacitor to SW pin.
Open drain output of the phase fault circuits. Connect to an external pull-up resistor.
Output is low when a MOSFET fault or over temperature condition is detected.
3.3V logic level tri-state PWM input and 7V tolerant. “High” turns the control MOSFET
on, and “Low” turns the synchronous MOSFET on . “Tri - state” tur ns both MOSFETs off in
Body-Braking? mode. In diode emulation mode, “Tri - state” activates internal diode
emulation control. See “PWM Tri - state Input” S ection for further details about the PWM
Tri-State functions.
3.3V logic level input and 7V tolerant with internal weak pull-up to 3.3V. Logic low
disables both MOSFETs. Pull up to VCC if Body-Braking? is not used. Pulling BBRK# low
at least 20ns after VCC passes its UVLO threshold selects internal diode emulation
control. See “Body -Braking? Mode” Section for further details.
Signal ground. Driver control logic, analog circuits and IC substrate are referenced to
this pin.
Reference voltage input from the PWM controller. IOUT signal is referenced to the
voltage on this pin. Connect to LGND if the current sense amplifier is not used.
Current output signal. Voltage on this pin is equal to V(REFIN) + 32.5 * [V(CSIN+) –
V(CSIN-)]. Float this pin if the current sense amplifier is not used.
This pin is connected to internal power and signal ground of the driver. For best
performance of the current sense amplifier, TGND must be electrically isolated from
Power Ground (PGND) and Signal Ground (LGND) in the PCB layout.
4
March 12, 2012 | FINAL DATASHEET
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