参数资料
型号: IR3623MTRPBF
厂商: International Rectifier
文件页数: 15/27页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 32MLPQ
标准包装: 1
PWM 型: 电压模式
输出数: 2
频率 - 最大: 1.2MHz
占空比: 85%
电源电压: 8.5 V ~ 14.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 32-VFQFN 裸露焊盘
包装: 标准包装
其它名称: IR3623MTRPBFDKR
IR3623MPbF
Over-Current Protection
The over current protection is performed by
28uA
sensing current through the R DS(on) of low side
MOSFET. This method enhances the converter’s
22uA
OCP
efficiency and reduce cost by eliminating a
current sense resistor. As shown in figure 13, an
external resistor (R SET ) is connected between
OCSet pin and the drain of low side MOSFET
(Q2) which sets the current limit set point.
SS1 / SD
20
3uA
The internal current source develops a voltage
across R SET . When the low side MOSFET is
turned on, the inductor current flows through the
Q2 and results a voltage which is given by:
Fig. 14: 3uA current source for discharging
soft-start capacitor during hiccup
The OCP circuit starts sampling current 200ns
(typical) after PWM signal goes high. The OCSet
V OCSet ? (I OCSet ? R OCSet ) ? (R DS(on) ? I L )
I OCSET
IR3623
OCSet R SET
- - - - ( 6 )
IP200x
Q1
L1
V OUT
pin is internally clamped to prevent false trigging,
figure 15 shows the OCSet pin during one
switching cycle.
Q2
Hiccup
Control
OCGnd
Fig. 13: Connection of over current sensing resistor
I OCset * R OCset
The critical inductor current can be calculated by
setting:
V OCSet ? (I OCSet ? R OCSet ) ? (R DS(on) ? I L ) ? 0
I SET ? I L ( critical ) ?
R OCSet ? I OCSet
R DS ( on )
- - - - ( 7 )
Fig. 15: OCset pin during normal condition
Ch1: Inductor point, Ch2:Ldrv, Ch3:OCSet
An over current is detected if the OCSet pin goes
below ground. This trips the OCP comparator
and cycles the soft start function in hiccup mode.
The hiccup is performed by charging and
discharging the soft-start capacitor in certain
slope rate. As shown in figure 14 a 3uA current
source is used to discharge the soft-start
capacitor.
The OCP comparator resets after every soft start
cycles, the converter stays in this mode until the
overload or short circuit is removed. The
converter will automatically recover.
During this fault condition the Ph_En signal is low
and PWM output is on Tri-state, see figure 12.
The value of R SET should be checked in an actual
circuit to ensure that the over current protection
circuit activates as expected. The IR3623 current
limit is designed primarily as disaster preventing,
"no blow up" circuit, and doesn't operate as a
precision current regulator.
When the SS2 is floating over current on either
phase would result to hiccup of output voltage.
www.irf.com
January 28, 2013
15
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