参数资料
型号: IR3640MPBF
厂商: International Rectifier
文件页数: 10/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 20-MLPQ
标准包装: 100
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.65MHz
占空比: 92%
电源电压: 4.5 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 20-VFQFN 裸露焊盘
包装: 管件
IR3640MPBF
Figure 3c shows the recommended startup
sequence for sequenced operation of IR3640
with Enable used as logic input.
Fig. 5. Pre-Bias startup pulses
Soft-Start
The IR3640 has a programmable soft-start to
control the output voltage rise and limit the
current surge at the start-up. To ensure correct
start-up, the soft-start sequence initiates when
the Enable and Vcc rise above their UVLO
Fig. 3c. Recommended startup sequence,
Sequenced operation
Pre-Bias Startup
IR3640 is able to start up into pre-charged
output, which prevents oscillation and
thresholds and generate the Power On Ready
(POR) signal. The internal current source
(typically 20uA) charges the external capacitor
C ss linearly from 0V to 3V. Figure 6 shows the
waveforms during the soft start.
The start up time can be estimated by:
disturbances of the output voltage.
The output starts in asynchronous fashion and
keeps the synchronous MOSFET off until the first
T start =
( 1.4 - 0.7 ) * C SS
20 μ A
- - (1)
gate signal for control MOSFET is generated.
Figure 4 shows a typical Pre-Bias condition at
start up.
The synchronous MOSFET always starts with a
narrow pulse width and gradually increases its
duty cycle with a step of 25%, 50%, 75% and
100% until it reaches the steady state value. The
number of these startup pulses for the
synchronous MOSFET is internally programmed.
Figure 5 shows a series of 32, 16, 8 startup
pulses.
Fig. 4. Pre-Bias startup
06/15/2009
During the soft start the OCP is enabled to
protect the device for any short circuit and over
current condition.
The SS pin can be used as shutdown signal,
pulling low this pin will result to turning off the
high side driver and turning on the low side
driver.
Fig. 6. Theoretical operation waveforms
during soft-start
10
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