参数资料
型号: IR3640MPBF
厂商: International Rectifier
文件页数: 14/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 20-MLPQ
标准包装: 100
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.65MHz
占空比: 92%
电源电压: 4.5 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 20-VFQFN 裸露焊盘
包装: 管件
IR3640MPBF
Minimum on time Considerations
The minimum ON time is the shortest amount of
time for which the Control FET may be reliably
turned on, and this depends on the internal
timing delays. For the IR3640, the typical
minimum on-time is specified as 50 ns.
Any design or application using the IR3640 must
ensure operation with a pulse width that is higher
than this minimum on-time and preferably higher
than 100 ns. This is necessary for the circuit to
operate without jitter and pulse-skipping, which
can cause high inductor current ripple and high
output voltage ripple.
Maximum Duty Ratio Considerations
A fixed off-time of 200 ns maximum is specified
for the IR3640. This provides an upper limit on
the operating duty ratio at any given switching
frequency. It is clear, that higher the switching
frequency, the lower is the maximum duty ratio at
which the IR3640 can operate. To allow some
margin, the maximum operating duty ratio in any
application using the IR3640 should still
accommodate about 250 ns off-time. Figure 11
shows a plot of the maximum duty ratio vs. the
switching frequency, with 250 ns off-time.
t on =
=
D
F s
V out
V in × F s
95
90
85
80
M a x Duty Cycle
In any application that uses the IR3640, the
following condition must be satisfied:
t on (min) ≤ t on
75
70
65
60
55
∴ t on (min) ≤
V out
V in × F s
250
450
650 850 1050 1250
S w itching Frequency (kH z )
1450
1650
∴ V in × F s ≤
V out
t on (min)
Fig. 11: Maximum duty cycle vs. switching
frequency
The minimum output voltage is limited by the
reference voltage and hence V out(min) = 0.7 V.
Therefore, for V out(min) = 0.7 V,
∴ V in × F s ≤
V out (min)
t on (min)
∴ V in × F s ≤
0.7 V
100 ns
= 7 × 10 6 V/s
Therefore, at the maximum recommended input
voltage 24V and minimum output voltage, the
converter should be designed at a switching
frequency that does not exceed 292 kHz.
Conversely, for operation at the maximum
recommended operating frequency 1.65 MHz
and minimum output voltage, any voltage above
4.2 V may not be stepped down without pulse-
skipping.
06/15/2009
14
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