参数资料
型号: IRDC3839
厂商: International Rectifier
文件页数: 19/35页
文件大小: 0K
描述: KIT EVAL REG 6A SUPIRBUCK DC/DC
标准包装: 1
系列: SupIRBuck™
主要目的: DC/DC,LDO 步降
输出及类型: 1,非隔离
输出电压: 1.8V
电流 - 输出: 6A
输入电压: 12V
稳压器拓扑结构: 降压
频率 - 开关: 600kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: IR3839
IR3839MPbF
Minimum on time Considerations
The minimum ON time is the shortest amount of
time for which the Control FET may be reliably
turned on, and this depends on the internal
timing delays. For the IR3839, the typical
minimum on-time is specified as 70 ns.
Any design or application using the IR3839 must
ensure operation with a pulse width that is higher
than this minimum on-time and preferably higher
than 150 ns. This is necessary for the circuit to
operate without jitter and pulse-skipping, which
can cause high inductor current ripple and high
output voltage ripple.
Maximum Duty Ratio Considerations
A fixed off-time of 300 ns maximum is specified
for the IR3839. This provides an upper limit on
the operating duty ratio at any given switching
frequency. Thus, the higher the switching
frequency, the lower is the maximum duty ratio at
which the IR3839 can operate. To allow some
margin, the maximum operating duty ratio in any
application using the IR3839 should still
accommodate about 500 ns off-time. Fig 14.
shows a plot of the maximum duty ratio v/s the
switching frequency, with 300 ns off-time.
t on ?
D
F s
?
V out
V in ? F s
95
90
85
In any application that uses the IR3839, the
following condition must be satisfied:
t on (min) ? t on
80
75
70
65
60
55
? t on (min) ?
? V in ? F s ?
V out
V in ? F s
V out
t on (min)
The minimum output voltage is limited by the
reference voltage and hence V out(min) = 0.6 V.
Therefore, for V out(min) = 0.6 V,
V out (min)
? V in ? F s ?
t on (min)
50
250 450 650 850 1050 1250 1450
Switching Frequency (kHz)
Fig. 14. Maximum duty cycle v/s switching
frequency.
1650
? V in ? F s ?
0.6 V
150 ns
? 4 ? 10 6 V/s
Therefore, at the maximum recommended input
voltage 16V and minimum output voltage, the
converter should be designed at a switching
frequency that does not exceed 250 kHz.
Conversely, for operation at the maximum
recommended operating frequency (1.65 MHz)
and minimum output voltage (0.6V), The input
voltage (PVin) should not exceed 2.42V,
otherwise pulse skipping will happen.
At low output voltages (below 1V) specially at
Vo=0.6V, it is recommended to design the
compensator so that the bandwidth of the loop
does not exceed 1/10 of the switching frequency.
Rev 1.41
19
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