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参数资料
| 型号： | IRDC3856W |
| 厂商： | International Rectifier |
| 文件页数： | 29/34页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL SUPIRBUCK IR3856W |
| 产品培训模块： | SupIRBuck? Family and POL Design Tools Overview |
| 标准包装： | 1 |
| 系列： | SupIRBuck™ |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 1.8V |
| 电流 - 输出： | 6A |
| 输入电压： | 12V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 600kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | IR3856W |
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PD-97506
IR3856WMPbF
Layout Considerations
Vin
PGnd
PGnd
capacitor at the Sw pin.
AGnd Vout
The layout is very important when designing high
frequency switching converters. Layout will affect
noise pickup and can cause a good design to
perform with less than expected results.
Make all the connections for the power
components in the top layer with wide, copper
filled areas or polygons. In general, it is desirable
to make proper use of power planes and
polygons for power distribution and heat
dissipation.
The inductor, output capacitors and the IR3856W
should be as close to each other as possible.
This helps to reduce the EMI radiated by the
power traces due to the high switching currents
through them. Place the input capacitor directly at
the Vin pin of IR3856W.
The feedback part of the system should be kept
away from the inductor and other noise sources.
The critical bypass components such as
capacitors for Vcc should be close to their
respective pins. It is important to place the
feedback components including feedback
resistors and compensation components close to
Fb and Comp pins.
Compensation parts
should be placed as close
as possible to
the Comp pin .
Vout
The connection between the OCSet resistor and
the Sw pin should not share any trace with the
connection between the bootstrap capacitor and
the Sw pin. Instead, it is recommended to use a
Kelvin connection of the trace from the OCSet
resistor and the trace from the bootstrap
Vin
VoutAGnd
In a multilayer PCB use one layer as a power
ground plane and have a control circuit ground
(analog ground), to which all signals are
referenced. The goal is to localize the high
current path to a separate loop that does not
interfere with the more sensitive analog control
function. These two grounds must be connected
together on the PC board layout at a single point.
The Power QFN is a thermally enhanced
package. Based on thermal performance it is
recommended to use at least a 4-layers PCB. To
effectively remove heat from the device the
exposed pad should be connected to the ground
plane using vias. Figure 26 illustrates the
implementation of the layout guidelines outlined
above, on the IRDC3856W 4 layer demoboard.
Vin
All bypass caps
should be placed as
close as possible to
their connecting
pins.
Resistors Rt, Rocset,
AGnd
Vin
and SS capacitor
should be placed as
close as possible to
their pins.
PGnd
Fig. 26a. IRDC3856W demo-board layout
considerations – Top Layer
Rev 9.0
29
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相关代理商/技术参数 |
参数描述 |
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| IRDC3859 | 功能描述:电源管理IC开发工具 User Guide IR3859 Eval Brd RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
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| IRDC3863 | 功能描述:电源管理IC开发工具 9999V 999A POL IC RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| IRDC3865 | 功能描述:电源管理IC开发工具 9999V 999A POL IC RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
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