参数资料
型号: IRDCIP1203-A
厂商: International Rectifier
文件页数: 10/23页
文件大小: 0K
描述: IP1203 REFERENCE DESIGN KIT
标准包装: 1
系列: iPOWIR™
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 1.8V
电流 - 输出: 15A
输入电压: 5.5 ~ 13.2 V
稳压器拓扑结构: 降压
频率 - 开关: 400kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: iP1203
相关产品: IP1203TRPBF-ND - IC REG BUCK SYNC ADJ 15A 24LGA
IP1203PBF-ND - IC REG BUCK SYNC ADJ 15A 24LGA
IP1203TR-ND - IC REG BUCK SYNC ADJ 15A 24LGA
IP1203-ND - IC REG BUCK SYNC ADJ 15A 24LGA
其它名称: *IRDCIP1203-A
iP1203
iP1203 User?s Design Guidelines
The iP1203 is a single output 15A power block con-
sisting of optimized power semiconductors, PWM
control and its associated passive components. It is
based on a synchronous buck topology and offers
an optimized solution where space, efficiency and
noise caused by parasitics are of concern. The power
block operates with fixed frequency voltage mode
control. The iP1203 components are integrated in a
land grid array (LGA) package.
SS
10
Css
Iss
iP1203
V IN / Enabling the Output
The input operating voltage range of the iP1203 is
5.5V to 13.2V.
The iP1203 output is turned on upon application of
input voltage. The V IN slew rate should not exceed
50mV/μs. The converter can also be turned on and
off by releasing or pulling the SS pin low through a
logic level MOSFET, the drain of which connects to
the soft start pin (see Fig.12). This feature can be
useful if sequencing or different start-up timing of dif-
ferent system outputs are required. In situations where
the output has undergone a latched shutdown due to
overvoltage, cycling Vin will reset the output. Cycling
soft start pin will not unlatch the output.
Soft Start
The Soft Start function provides a controlled rise of
the output voltage, thus limiting the inrush current.
The soft start function has an internal 25μA +/-20%
current source that charges the external soft start
capacitor C ss up to 3V. During power-up, the output
voltage starts ramping up only after the charging volt-
age across the C ss capacitor has reached a 0.8Vtyp
threshold, as shown in Fig. 13.
10
Fig.12: Soft Start/Enable Circuit
3V
0.8Vtyp
V Css
V OUT
Fig. 13: Power Up Threshold
Frequency and Synchronization
The operating switching frequency (f SW ) range of
iP1203 is 200 kHz to 400 kHz. The desired frequency
is set by placing an external resistor to the RT pin of
the iP1203. See Fig. 9 for the proper resistor value.
The iP1203 is capable of accepting an external digi-
tal synchronization signal. Synchronization will be
enabled by the rising edge clock. The free running
oscillator frequency is twice the switching frequency.
During synchronization, RT is selected such
that the free running frequency is 20% below the
synchronization frequency. The maximum synchro-
nization frequency that iP1203 can accept is 800kHz.
Note that the actual switching frequency is half the
synchronization frequency.
www.irf.com
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