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参数资料
| 型号： | IRHN57250SE |
| 英文描述： | 200V 100kRad Hi-Rel Single N-Channel SEE Hardened MOSFET in a SMD-1 package |
| 中文描述： | 200伏100kRad高可靠性单N通道看到一贴片MOSFET的硬化- 1封装 |
| 文件页数： | 2/8页 |
| 文件大小： | 124K |
| 代理商： | IRHN57250SE |
IRHN57250SE
Pre-Irradiation
2
www.irf.com
Electrical Characteristics
@ Tj = 25°C (Unless Otherwise Specified)
Parameter
Drain-to-Source Breakdown Voltage
BVDSS/
TJ Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
Min
200
—
Typ
—
0.23
Max Units
—
—
Test Conditions
VGS = 0V, ID = 1.0mA
Reference to 25°C, ID = 1.0mA
BVDSS
V
V/°C
—
—
0.06
VGS = 12V, ID = 19A
2.5
18
—
—
—
—
—
—
4.5
—
10
25
V
VDS = VGS, ID = 1.0mA
VDS > 15V, IDS = 19A
VDS= 160V ,VGS=0V
VDS = 160V,
VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VGS =12V, ID = 31A
VDS = 100V
S (
)
IGSS
IGSS
Qg
Qgs
Qgd
td
(on)
tr
td
(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.0
100
-100
132
45
60
35
125
80
80
—
nC
VDD = 100V, ID = 31A,
VGS =12V, RG = 2.35
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
3860
628
31
—
—
—
VGS = 0V, VDS = 25V
f = 1.0MHz
pF
nA
nH
ns
μ
A
Thermal Resistance
Parameter
RthJC
Junction-to-Case
RthJ-PCB
Junction-to-PC board
Min Typ Max
—
—
—
6.6
Units
Test Conditions
0.83
—
soldered to a 2” square copper-clad board
°C/W
Measured from the center of
drain pad to center of source pad
Source-Drain Diode Ratings and Characteristics
Parameter
IS
Continuous Source Current (Body Diode)
ISM
Pulse Source Current (Body Diode)
Min Typ
—
—
Max Units
31
124
Test Conditions
—
—
VSD
trr
QRR
ton
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
—
—
—
—
—
—
1.2
450
6.0
V
nS
μ
C
T
j
= 25°C, IS = 31A, VGS = 0V
Tj = 25°C, IF = 31A, di/dt
≤
100A/
μ
s
VDD
≤
25V
Forward Turn-On Time
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
A
Note: Corresponding Spice and Saber models are available on the G&S Website.
For footnotes refer to the last page
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