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参数资料
| 型号： | IRLZ34 |
| 厂商： | NXP Semiconductors N.V. |
| 英文描述： | N-channel enhancement mode Logic level TrenchMOS transistor |
| 中文描述： | N沟道增强型晶体管逻辑电平TrenchMOS |
| 文件页数： | 1/7页 |
| 文件大小： | 62K |
| 代理商： | IRLZ34 |
Philips Semiconductors
Product specification
N-channel enhancement mode
Logic level TrenchMOS
TM
transistor
IRLZ34N
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode logic
level field-effect power transistor in a
plastic
envelope
technology.Thedevicefeaturesvery
low on-state resistance and has
integral zener diodes giving ESD
protectionup to2kV. Itisintendedfor
useinswitchedmodepowersupplies
and
general
purpose
applications.
SYMBOL
PARAMETER
MAX.
UNIT
using
’
trench
’
V
DS
I
D
P
tot
T
j
R
DS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
55
30
68
175
35
V
A
W
C
m
V
GS
= 10 V
switching
PINNING - TO220AB
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
3
source
tab
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
V
DSS
Drain-source voltage
V
DGR
Drain-gate voltage
V
GS
Gate-source voltage
I
D
Continuous drain current
CONDITIONS
T
j
= 25 C to 175C
T
j
= 25 C to 175C; R
GS
= 20 k
MIN.
-
-
-
-
-
-
-
- 55
MAX.
55
55
±
13
30
21
110
68
175
UNIT
V
V
V
A
A
A
W
C
T
mb
= 25 C
T
mb
= 100 C
T
mb
= 25 C
T
mb
= 25 C
I
DM
P
D
T
j
, T
stg
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-mb
Thermal resistance junction
to mounting base
R
th j-a
Thermal resistance junction
to ambient
CONDITIONS
TYP.
-
MAX.
2.2
UNIT
K/W
60
-
K/W
ESD LIMITING VALUE
SYMBOL PARAMETER
V
C
Electrostatic discharge
capacitor voltage, all pins
CONDITIONS
Human body model (100 pF, 1.5 k
)
MIN.
-
MAX.
2
UNIT
kV
d
g
s
1 2 3
tab
February 1999
1
Rev 1.000
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相关代理商/技术参数 |
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| IRLZ34N | 制造商:International Rectifier 功能描述:MOSFET N LOGIC TO-220 |
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