参数资料
型号: IRS2332DSPBF
厂商: International Rectifier
文件页数: 12/39页
文件大小: 0K
描述: IC BRIDGE DVR 3PH 600V 28-SOIC
标准包装: 25
配置: 3 相桥
输入类型: 反相
延迟时间: 500ns
电流 - 峰: 250mA
配置数: 1
输出数: 3
高端电压 - 最大(自引导启动): 600V
电源电压: 10 V ~ 20 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC W
包装: 管件
IRS233(0,2)(D)(S&J)PbF
Matched Propagation Delays
The IRS233(0,2)(D) family of HVICs is designed with propagation delay matching circuitry. With this feature, the IC’s
response at the output to a signal at the input requires approximately the same time duration (i.e., t ON , t OFF ) for both the low-
side channels and the high-side channels. Additionally, the propagation delay for each low-side channel is matched when
compared to the other low-side channels and the propagation delays of the high-side channels are matched with each other.
The propagation turn-on delay (t ON ) of the IRS233(0,2)(D) is matched to the propagation turn-on delay (t OFF ).
Input Logic Compatibility
The inputs of this IC are compatible with standard CMOS and TTL outputs. The IRS233(0,2)(D) family has been designed to
be compatible with 3.3 V and 5 V logic-level signals. The IRS233(0,2)(D) features an integrated 5.2 V Zener clamp on the
HIN, LIN, and ITRIP pins. Figure 6 illustrates an input signal to the IRS233(0,2)(D), its input threshold values, and the logic
state of the IC as a result of the input signal.
Figure 6: HIN & LIN input thresholds
Undervoltage Lockout Protection
This family of ICs provides undervoltage lockout protection on both the V CC (logic and low-side circuitry) power supply and the
V BS (high-side circuitry) power supply. Figure 7 is used to illustrate this concept; V CC (or V BS ) is plotted over time and as the
waveform crosses the UVLO threshold (V CCUV+/- or V BSUV+/- ) the undervoltage protection is enabled or disabled.
Upon power-up, should the V CC voltage fail to reach the V CCUV+ threshold, the IC will not turn-on. Additionally, if the V CC
voltage decreases below the V CCUV- threshold during operation, the undervoltage lockout circuitry will recognize a fault
condition and shutdown the high- and low-side gate drive outputs, and the FAULT pin will transition to the low state to inform
the controller of the fault condition.
Upon power-up, should the V BS voltage fail to reach the V BSUV threshold, the IC will not turn-on. Additionally, if the V BS voltage
decreases below the V BSUV threshold during operation, the undervoltage lockout circuitry will recognize a fault condition, and
shutdown the high-side gate drive outputs of the IC.
The UVLO protection ensures that the IC drives the external power devices only when the gate supply voltage is sufficient to
fully enhance the power devices. Without this feature, the gates of the external power switch could be driven with a low
voltage, resulting in the power switch conducting current while the channel impedance is high; this could result in very high
conduction losses within the power device and could lead to power device failure.
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