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参数资料
| 型号： | IS80C32-12PL |
| 厂商： | INTEGRATED SILICON SOLUTION INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, 12 MHz, MICROCONTROLLER, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 22/48页 |
| 文件大小： | 379K |
| 代理商： | IS80C32-12PL |
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IS80C52
IS80C32
Integrated Silicon Solution, Inc. — 1-800-379-4774
29
MC004-1D
11/19/98
ISSI
INTERRUPT SYSTEM
The IS80C52/32 provides six interrupt sources: two
external interrupts, three timer interrupts, and a serial port
interrupt. These are shown in Figure 19.
The External Interrupts INT0 and INT1 can each be either
level-activated or transition-activated, depending on bits
IT0 and IT1 in Register TCON. The flags that actually
generate these interrupts are the IE0 and IE1 bits in
TCON. When the service routine is vectored to, hardware
clears the flag that generated an external interrupt only if
the interrupt was transition-activated. If the interrupt was
level-activated, then the external requesting source (rather
than the on-chip hardware) controls the request flag.
The Timer 0 and Timer 1 Interrupts are generated by TF0
and TF1, which are set by a rollover in their respective
Timer/Counter registers (except for Timer 0 in Mode 3).
When a timer interrupt is generated, the on-chip hardware
clears the flag that generated it when the service routine
is vectored to.
The Serial Port Interrupt is generated by the logical OR of
RI and TI. Neither of these flags is cleared by hardware
when the service routine is vectored to. In fact, the service
routine normally must determine whether RI or TI generated
the interrupt, and the bit must be cleared in software.
In the IS80C52/32, the Timer 2 Interrupt is generated by
the logical OR of TF2 and EXF2. Neither of these flags is
cleared by hardware when the service routine is vectored
to. In fact, the service routine may have to determine
whether TF2 or EXF2 generated the interrupt, and the bit
must be cleared in software.
All of the bits that generate interrupts can be set or cleared
by software, with the same result as though they had been
set or cleared by hardware. That is, interrupts can be
generated and pending interrupts can be canceled in
software.
Each of these interrupt sources can be individually enabled
or disabled by setting or clearing a bit in Special Function
Register IE (interrupt enable) at address 0A8H. As well as
individual enable bits for each interrupt source, there is a
global enable/disable bit that is cleared to disable all
interrupts or set to turn on interrupts (see SFR IE).
Figure 19. Interrupt System
INT1
INTERNAL
SERIAL
PORT
T2EX
SCON.0
RI
SCON.1
TI
TIMER/COUNTER 1
TCON.7
TF1
EXTERNAL
INT RQST 1
TCON.3
IE1
TIMER/COUNTER 0
TCON.5
TF0
EXTERNAL
INT RQST 0
TCON.1
IE0
INT0
IE.4
IE.3
ET1
IE.2
EX1
IE.1
ET0
IE.0
EX0
IE.7
IP.4
PS
TIMER/
COUNTER 2
T2CON.7
TF2
T2CON.6
EXF2
IE.5
IP.5
PT2
ET2
EA
IP.3
PT1
IP.2
PX1
IP.1
PT0
IP.0
PX0
POLLING
HARDWARE
SOURCE
I.D.
HIGH PRIORITY
INTERRUPT
REQUEST
VECTOR
SOURCE
I.D.
LOW PRIORITY
INTERRUPT
REQUEST
VECTOR
ES
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| IS80C732-C | 8-BIT, 12 MHz, MICROCONTROLLER, PQCC44 |
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| IS82C55A-596 | 24 I/O, PIA-GENERAL PURPOSE, PQCC44 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IS80C32-12PLI | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER |
| IS80C32-12PQ | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER |
| IS80C32-12PQI | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER |
| IS80C32-12R | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit Microcontroller |
| IS80C32-12W | 制造商:ISSI 制造商全称:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP LOW VOLTAGE 8-BIT MICROCONTROLLER |
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