参数资料
| 型号： | ISL5585GCR-TK |
| 厂商： | Intersil |
| 文件页数： | 14/24页 |
| 文件大小： | 0K |
| 描述： | IC SLIC RINGING 3.3V VOB 32-QFN |
| 标准包装： | 1,000 |
| 功能： | 用户线路接口概念（SLIC） |
| 电路数： | 1 |
| 电源电压： | 3.3V |
| 功率（瓦特）： | 305mW |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（7x7） |
| 包装： | 带卷 (TR) |
| 包括： | 均衡和不均衡振铃，振铃声信号发生器，热关机，带警报指示器 |
21
switch is designed to have a maximum on voltage of 0.6V
with a load current of 45mA.
Since the device provides the ringing waveform, the relay
functions which may be supported include subscriber
disconnect, test access or line interface bypass. An external
snubber diode is not required when using the uncommitted
switch as a relay driver.
Test Load
The switch may be used to connect test loads across Tip and
Ring. The test loads can provide external test termination for
the device. Proper connection of the uncommitted switch to
Tip and Ring is shown below.
The diode in series with the test load blocks current from
flowing through the uncommitted switch when the polarity of
the Tip and Ring terminals are reversed. In addition to the
reverse active state, the polarity of Tip and Ring are reversed
for half of the ringing cycle. With independent logic control
and the blocking diode, the uncommitted switch may be
continuously connected to the Tip and Ring terminals.
Special Considerations for the QFN
Package
The new Quad Flatpack No-lead (QFN) package offers a
significant footprint reduction (65%) and improved thermal
performance with respect to the 28 lead PLCC. To realize the
thermal enhancements and maintain the high voltage
(-100V) performance, the exposed pad on the bottom of the
QFN package should be soldered to a power/heat sink plane
that is electrically connected to the ISL5585 Substrate
Common Connection (SCC) pin. The heat is distributed
evenly across the board by way of the heat sink plane. This
is accomplished by using conductive thermal vias.
Reference technical brief TB379 and AN9922 for additional
information on thermal characterization and board layout
considerations.
FIGURE 15. EXTERNAL RELAY SWITCHING
RELAY
SW+
SW-
SWC
+V
FIGURE 16. TEST LOAD SWITCHING
RING
TIP
TEST
LOAD
SW+
SW-
SWC
TABLE 2. ISL5585 3V APPLICATION CIRCUIT COMPONENTS
COMPONENT
VALUE
TOL
RATING
U1 - Ringing SLIC
ISL5585
N/A
RTL
18.7k
1%
0.1W
RRT
23.7k
1%
0.1W
RSH
49.9k
1%
0.1W
RIL
71.5k
1%
0.1W
RS
66.5k
1%
0.1W
RF
30.1k
1%
0.1W
RA
36.5k
1%
0.1W
RB
42.2Kk
1%
0.1W
RIN
45.3k
1%
0.1W
CRS, CTX, CRT, CPOL
0.47
F
20%
10V
CDC, CFB
4.7
F
20%
6.3V
CPS1
0.1
F
20%
>100V
CPS2, CPS3
0.1
F
20%
100V
D1
1N400X type with breakdown > 100V.
RP1, RP2
Standard applications will use
≥ 49 per side. Protection resistor
values are application dependent and will be determined by
protection requirements.
Design Parameters: Ring Trip Threshold = 76mAPEAK, Switch Hook
Threshold = 12mA, Loop Current Limit = 24.6mA, Synthesize Device
Impedance = (3*66.5k
)/400 = 498.8, with 49.9 protection
resistors, impedance across Tip and Ring terminals = 599
.
Transient current limit = 95mA.
ISL5585
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