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参数资料
| 型号： | ISL5586CIM |
| 厂商： | INTERSIL CORP |
| 元件分类： | 模拟传输电路 |
| 英文描述： | Low Power Ringing SLIC for Home Gateways |
| 中文描述： | TELECOM-SLIC, PQCC28 |
| 封装： | PLASTIC, MS-018AB, LCC-28 |
| 文件页数： | 6/20页 |
| 文件大小： | 497K |
| 代理商： | ISL5586CIM |
4-6
Design Equations
Refer to Figure 14 for programming resistor connections.
Loop Supervision Thresholds
SWITCH HOOK DETECT
The desired switch hook detect threshold current (I
SH
) is set by
a single external resistor, R
SH
as follows
The loop current threshold programming range is from 5mA
to 15mA.
RING TRIP DETECT
The ring trip detect threshold (I
RT
) is set by a single external
resistor, R
RT
as follows.
I
RT
should be set between the peak ringing current and the
peak off hook current while still ringing. In addition, the ring
trip current must be set below the transient current limit
including tolerances. The ringing signal filter capacitor C
RT
,
in parallel with R
RT
sets the ring trip response time.
LOOP CURRENT LIMIT
The DC loop current limit (I
LIM
) is programmed by the
external resistor R
IL
as follows.
The loop current limit programming range is from 15mA to
45mA.
Impedance Matching
The AC source impedance of the SLIC is programmed with
the external impedance network Z
S
as described next. To
synthesize and match Resistive line terminations the
programming network is simply a resistor (R
S
) as shown in
Figure 14. For complex line terminations such as the one
illustrated in Figure 1, a complex programming network is
required.
RESISTIVE IMPEDANCE SYNTHESIS
The AC source resistance of the SLIC is synthesized with a
single external resistor R
S
as follows:
The synthesized resistance (Z
0
) is determined by the
characteristic line resistance and protection resistors as
shown in Equation 5.
COMPLEX IMPEDANCE SYNTHESIS
A complex network is used in place of R
S
when the termination
impedance of the line is complex as shown in Figure 1.
The component R
S
has a different design equation than the
R
S
used for resistive impedance synthesis. The design
equations for each component are provided below where
RP1 and RP2 are the protection resistors and R
P
is a
component of the programming network.
V
BH
to 4-Wire, BSEL = 2.0V
f = 50Hz
f = 300Hz
≤
f
≤
3400Hz
f = 8kHz
≤
f
≤
16kHz
-
-
-
76
55
42
-
-
-
dB
dB
dB
NOTES:
2. These parametersare controlled via design and Statistical ProcessControl and are notdirectlytested. These parametersare characterized upon
initial design release and upon design changes which would affect these characteristics.
3. Input voltage = 0.636V
RMS
for V
BH
= -100V, 0.530V
RMS
for V
BH
= -85V and 0.460V
RMS
for -75V devices.
4. Tested per IEEE455-1985, with 368
resistors
connected to the Tip and Ring terminals.
5. These parameters are tested 100% at room temperature, and are guaranteed but not tested across the full temperature range via statistical
characterization and design.
6. The power dissipation isbased on actual device measurementsand willbe lessthan worst case calculations based on data sheet supplycurrent limits.
7. Characterized with 2 x 10us and 10 x 1000us first level lightning surge waveform (GR-1089-CORE).
Electrical Specifications
Unless Otherwise Specified, T
= -40
o
C to 85
o
C, V
= -24V, V
= -100V, V
= +5V,
AGND = BGND = 0V, loop current limit = 25mA. All AC Parameters are specified at 600
,
2-wire terminating impedance over the frequency band of 300Hz to 3.4kHz. Protection
resistors = 0
. These parameters apply generically to each product offering.
(Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
R
SH
615 I
SH
=
(EQ. 1)
R
RT
1800 I
RT
=
(EQ. 2)
R
IL
LIM
------------
=
(EQ. 3)
R
S
Z
0
---------
×
133.3 Z
0
)
=
=
(EQ. 4)
Z
O
R
L
RP
1
RP
2
+
(
)
–
=
(EQ. 5)
FIGURE 1. COMPLEX PROGRAMMING NETWORK
2-WIRE TERMINATION
IMPEDANCE (Z
L
)
C
2
R
1
R
2
PROGRAMMING
NETWORK (Z
S
)
C
P
R
S
R
P
R
S
133.3
R1
RP
1
–
RP
2
–
(
)
×
=
(EQ. 6)
R
P
133.3
R
2
×
=
(EQ. 7)
C
P
C
2
133.3
=
(EQ. 8)
ISL5586
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