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参数资料
| 型号： | ISL6218CVZ-T |
| 厂商： | Intersil |
| 文件页数： | 3/19页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR INTEL PENT M 38-TSSOP |
| 标准包装： | 2,500 |
| 应用： | 处理器 |
| 电流 - 电源： | 1.4mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | -10°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 38-TFSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 38-TSSOP |
| 包装： | 带卷 (TR) |
ISL6218
Absolute Maximum Ratings
Supply Voltage VDD, VDDP . . . . . . . . . . . . . . . . . . . . . . -0.3 to +7V
Battery Voltage, VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+25V
Boot1 and UGATE1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+33V
Phase1 and ISEN1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+28V
Boot1 with respect to Phase1 . . . . . . . . . . . . . . . . . . . . . . . . . +6.5V
UGATE1. . . . . . . . . . . . . . . . . . . . (Phase1 - 0.3V) to (Boot1 + 0.3V)
All other pins . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VDD + 0.3V)
Thermal Information
Thermal Resistance (Typical) θ JA (°C/W) θ JC (°C/W)
TSSOP Package (Note 1) . . . . . . . . . . . . 72 N/A
QFN Package (Notes 2, 3) . . . . . . . . . . . 32 4.5
Maximum Operating Junction Temperature. . . . . . . . . . . . . . +125°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
Recommended Operating Conditions
Supply Voltage, VDD, VDDP . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%
Battery Voltage, VBAT . . . . . . . . . . . . . . . . . . . . . . . . . +5.6V to 21V
Ambient Temperature. . . . . . . . . . . . . . . . . . . . . . . . .-10°C to +85°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .-10°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θ JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
3. For θ JC , the “case temp” location is the center of the exposed metal pad on the package underside.
4. Limits established by characterization and are not production tested.
Electrical Specifications
Operating Conditions: V DD = 5V, T A = -10°C to +85°C, Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
INPUT SUPPLY POWER
Input Supply Current, I(VDD)
POR (Power-On Reset) Threshold
EN = 3.3V, DSEN = 0, DRSEN = 0
EN = 0V
VDD Rising
VDD Falling
-
-
4.39
4.10
1.4
1
4.45
4.20
-
-
4.5
4.37
mA
μA
V
V
REFERENCE AND DAC
System Accuracy
DAC (VID0 to VID5) Input Low
Percent system deviation from programmed VID Codes @ 1.356
DAC Programming Input Low Threshold Voltage
-0.8
-
-
-
0.8
0.3
%
V
Voltage
DAC (VID0 to VID5) Input High
DAC Programming Input High Threshold Voltage
0.7
-
-
V
Voltage
Maximum Output Voltage
Minimum Output Voltage
-
-
1.708
0.70
-
-
V
V
CHANNEL GENERATOR
Frequency, f SW
Adjustment Range
R Fset = 243k, ±1%
225
250
250
-
275
500
kHz
kHz
ERROR AMPLIFIER
DC Gain
-
100
-
dB
Gain-Bandwidth Product
Slew Rate
C L = 20pF
C L = 20pF
-
-
18
4.0
-
-
MHz
V/μs
3
FN9101.6
August 6, 2007
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