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参数资料
| 型号： | ISL6219ACAZ |
| 厂商： | Intersil |
| 文件页数： | 13/17页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 28-QSOP |
| 标准包装： | 48 |
| PWM 型： | 电压模式 |
| 输出数： | 3 |
| 频率 - 最大： | 1.5MHz |
| 占空比： | 75% |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -10°C ~ 85°C |
| 封装/外壳： | 28-SSOP（0.154"，3.90mm 宽） |
| 包装： | 管件 |
ISL6219A
.
P UP , 2 ≈ V IN ? ------ – ------------- ? ? ---- 2 ? f S
Δ T 1
? I M I L , PP ? ? t ?
? N 2 ? ? 2 ?
(EQ. 10)
Δ T 2
R ISEN , 2 = R ISEN ----------
(EQ. 14)
A third component involves the lower MOSFET’s reverse-
recovery charge, Q rr . Since the inductor current has fully
commutated to the upper MOSFET before the lower-
MOSFET’s body diode can recover all of Q rr , it is conducted
through the upper MOSFET across VIN. The power
dissipated as a result is P UP,3 and is simply:
In Equation 14, make sure that Δ T 2 is the desired temperature
rise above the ambient temperature, and Δ T 1 is the measured
temperature rise above the ambient temperature. While a
single adjustment according to Equation 14 is usually
sufficient, it may occasionally be necessary to adjust R ISEN
two or more times to achieve perfect thermal balance
between all channels.
P UP , 3 = V IN Q rr f S
(EQ. 11)
Load-Line Regulation Resistor
Finally, the resistive part of the upper MOSFET’s is given in
Equation 12 as P UP,4 .
The load-line regulation resistor is labeled R FB in Figure 7.
Its value depends on the desired full-load droop voltage
(V DROOP in Figure 7). If Equation 13 is used to select each
I PP2
? I M ?
P UP , 4 = r DS ( ON ) ? ------ ? d + ----------
? N ? 12
2
(EQ. 12)
ISEN resistor, the load-line regulation resistor is as shown
in Equation 15.
– 6
V DROOP
R FB = -------------------------
50 × 10 (EQ. 15)
In this case, of course, r DS(ON) is the on resistance of the
∑ R ISEN ( n )
R FB = --------------------------------
I FL r DS ( ON )
upper MOSFET.
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 9, 10, 11 and 12. Since the power equations
depend on MOSFET parameters, choosing the correct
MOSFETs can be an iterative process that involves
repetitively solving the loss equations for different MOSFETs
and different switching frequencies until converging upon the
best solution.
Current Sensing
Pins 23, 20 and 19 are the ISEN pins denoted ISEN1, ISEN2
and ISEN3, respectively. The resistors connected between
these pins and the phase nodes determine the gains in the
load-line regulation loop and the channel-current balance
loop. Select the values for these resistors based on the room
temperature r DS(ON) of the lower MOSFETs; the full-load
operating current, I FL ; and the number of phases, N
according to Equation 13 (see also Figure 4).
If one or more of the ISEN resistors was adjusted for thermal
balance as in Equation 14, the load-line regulation resistor
should be selected according to Equation16 where I FL is the
full-load operating current and R ISEN(n) is the ISEN resistor
connected to the n th ISEN pin.
V DROOP
n
(EQ. 16)
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation , there are two distinct
methods for achieving these goals.
COMPENSATING A LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
R ISEN = ----------------------- --------
.
r DS ( ON ) I FL
50 × 10 – 6 N
(EQ. 13)
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R C and C C .
In certain circumstances, it may be necessary to adjust the
value of one or more of the ISEN resistors. This can arise
when the components of one or more channels are inhibited
from dissipating their heat so that the affected channels run
hotter than desired (see the section entitled Channel-Current
Balance ). In these cases, chose new, smaller values of R ISEN
for the affected phases. Choose R ISEN,2 in proportion to the
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase.
13
Since the system poles and zero are effected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
FN9093.1
March 20, 2007
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相关代理商/技术参数 |
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|---|---|
| ISL6219ACAZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 28-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL6219CA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ISL6219CA-T | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL6220DWF2E WAF | 制造商:Harris Corporation 功能描述: |
| ISL6223 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
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