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参数资料
| 型号： | ISL6219ACAZ |
| 厂商： | Intersil |
| 文件页数： | 14/17页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 28-QSOP |
| 标准包装： | 48 |
| PWM 型： | 电压模式 |
| 输出数： | 3 |
| 频率 - 最大： | 1.5MHz |
| 占空比： | 75% |
| 电源电压： | 4.75 V ~ 5.25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -10°C ~ 85°C |
| 封装/外壳： | 28-SSOP（0.154"，3.90mm 宽） |
| 包装： | 管件 |
ISL6219A
Once selected, the compensation values in Equations 17
C 2 (OPTIONAL)
assure a stable converter with reasonable transient perfor-
mance. In most cases, transient performance can be
R C
C C
COMP
improved by making adjustments to R C . Slowly increase the
value of R C while observing the transient performance on an
oscilloscope until no further improvement is noted. Normally,
FB
C C will not need adjustment. Keep the value of C C from
Equations 17 unless some performance issue is noted.
R FB
+
V DROOP
-
VSEN
The optional capacitor C 2 , is sometimes needed to bypass
noise away from the PWM comparator (see Figure 5). Keep
a position available for C 2 , and be prepared to install a high-
frequency capacitor of between 22pF and 150pF in case any
jitter problem is noted.
COMPENSATION WITHOUT LOAD-LINE REGULATION
The non load-line regulated converter is accurately modeled
FIGURE 11. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6219A CIRCUIT
The feedback resistor, R FB , has already been chosen as out-
lined in Load-Line Regulation Resistor . Select a target band-
width for the compensated system, f 0 . The target bandwidth
must be large enough to assure adequate transient perfor-
mance, but smaller than 1/3 of the per-channel switching fre-
quency. The values of the compensation components
depend on the relationships of f 0 to the L-C pole frequency
and the ESR zero frequency. For each of the three cases
defined in the following, there is a separate set of equations
for the compensation components
.
as a voltage-mode regulator with two poles at the L-C
resonant frequency and a zero at the ESR frequency. A type
III controller, as shown in Figure 12, provides the necessary
compensation.
The first step is to choose the desired bandwidth, f 0 , of the
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than
1/3 of the switching frequency. The type-III compensator has
an extra high-frequency pole, f HF . This pole can be used for
added noise rejection or to assure adequate attenuation at
the error-amplifier high-order pole and zero frequencies. A
good general rule is to chose f HF = 10 f 0 , but it can be higher
if desired. Choosing f HF to be lower than 10 f 0 can cause
------------------- > f 0
R C = R FB ------------------------------------
0.75V
2 π V PP R FB f 0
------------------- ≤ f 0 < ------------------------------
2 π LC
Case 1:
Case 2:
1
2 π LC
2 π f 0 V pp LC
IN
0.75V IN
C C = ------------------------------------
1 1
2 π C ( ESR )
problems with too much phase shift below the system band-
width.
In the solutions to the compensation equations, there is a sin-
gle degree of freedom. For the solutions presented in Equa-
tions 18, R FB is selected arbitrarily. The remaining
compensation components are then selected according to
Equation 18.
C 2
R C = R FB --------------------------------------------
0.75 V
V PP ( 2 π ) 2 f 02 LC
IN
(EQ. 17)
R C
C C
COMP
C C = -------------------------------------------------------------
PP R FB LC
( 2 π ) 2 f 2 V
0.75V IN
0
FB
f 0 > ------------------------------
0.75 V IN ( ESR )
Case 3:
1
2 π C ( ESR )
2 π f 0 V pp L
R C = R FB ------------------------------------------
C 1
R 1
R FB
+
V DROOP
-
VSEN
2 π V PP R FB f 0 L
0.75V IN ( ESR ) C
C C = -------------------------------------------------
In Equations 17, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all out-
put capacitors; ESR is the equivalent-series resistance of the
bulk output-filter capacitance; and V PP is the peak-to-peak
sawtooth signal amplitude as described in Figure 5 and
Electrical Specifications on page 5.
14
FIGURE 12. COMPENSATION CIRCUIT FOR ISL6219A BASED
CONVERTER WITHOUT LOAD-LINE
REGULATION.
FN9093.1
March 20, 2007
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6219ACAZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 28-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ISL6219CA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ISL6219CA-T | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL6220DWF2E WAF | 制造商:Harris Corporation 功能描述: |
| ISL6223 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller |
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