参数资料
| 型号： | ISL62386HIEVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR ISL62386HI 32TQFN |
| 标准包装： | 1 |
| 系列： | * |
ISL62386
Pin Descriptions
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14, 27
15
16
17
18
19
20
21
22
23
24
25
26
28
29
30
31
32
Bottom
Pad
NAME
PGOOD
FSET2
FCCM
AGND2
VCC
AGND1
LDO3EN
FSET1
FB1
VOUT1
ISEN1
OCSET1
EN1
NC
PHASE1
UGATE1
BOOT1
LGATE1
LDO3
VIN
LDO5
PGND
LGATE2
BOOT2
UGATE2
PHASE2
EN2
OCSET2
ISEN2
VOUT2
FB2
FUNCTION
Open-drain power-good status output. Connect to LDO5 through a 100k resistor. Output will be high when both the SMPSs outputs
are within the regulation window with no faults detected.
Frequency control input for SMPS2. Connect a resistor to ground to program the switching frequency. A small ceramic capacitor
such as 10nF is necessary to parallel with this resistor to smooth the voltage.
Logic input to control efficiency mode. Logic high forces continuous conduction mode (CCM). Logic low allows full discontinuous
conduction mode (DCM). Float this pin for ultrasonic DCM operation.
Analog ground of the SMPS2.
Analog power supply input for reference voltages and currents. It is internally connected to the LDO5 output. Bypass to AGND1 or
AGND2 with a 1μF ceramic capacitor near the IC.
Analog ground of the SMPS1. AGND1 and AGND2 are connected together internally.
Logic input for enabling and disabling the LDO3 linear regulator. Positive logic input.
Frequency control input for SMPS1. Connect a resistor to ground to program the switching frequency. A small ceramic capacitor
such as 10nF is necessary to parallel with this resistor to smooth the voltage.
SMPS1 feedback input used for output voltage programming and regulation.
SMPS1 output voltage sense input. Used for soft-discharge.
SMPS1 current sense input. Used for overcurrent protection and R 3 regulation.
Input from current-sensing network, used to program the overcurrent shutdown threshold for SMPS1.
Logic input to enable and disable SMPS1. A logic high will enable SMPS1 immediately. A logic low will disable SMPS1. Floating this
input will delay SMPS1 start-up until after SMPS2 achieves regulation.
No connection.
SMPS1 switching node for high-side gate drive return and synthetic ripple modulation. Connect to the switching NMOS source, the
synchronous NMOS drain, and the output inductor for SMPS1.
High-side NMOS gate drive output for SMPS1. Connect to the gate of the SMPS1 switching FET.
SMPS1 bootstrap input for the switching NMOS gate drivers. Connect to PHASE1 with a 0.22μF ceramic capacitor.
Low-side NMOS gate drive output for SMPS1. Connect to the gate of the SMPS1 synchronous FET.
LDO3 linear regulator output, providing up to 100mA. Bypass to ground with a 4.7μF ceramic capacitor.
Feed-forward input for line voltage transient compensation. Connect to the power train input voltage.
5V linear regulator output, providing up to 100mA before switchover to SMPS2. Bypass to ground with a 4.7μF ceramic capacitor.
Power ground for SMPS1 and SMPS2. This provides a return path for synchronous FET switching currents.
Low-side NMOS gate drive output for SMPS2. Connect to the gate of the SMPS2 synchronous FET.
SMPS2 bootstrap input for the switching NMOS gate drivers. Connect to PHASE2 with a 0.22μF ceramic capacitor.
High-side NMOS gate drive output for SMPS2. Connect to the gate of the SMPS2 switching FET.
SMPS2 switching node for high-side gate drive return and synthetic ripple modulation. Connect to the switching NMOS source, the
synchronous NMOS drain, and the output inductor for SMPS2.
Logic input to enable and disable SMPS2. A logic high will enable SMPS2 immediately. A logic low will disable SMPS2. Floating this
input will delay SMPS2 start-up until after SMPS1 achieves regulation.
Input from current-sensing network, used to program the over-current shutdown threshold for SMPS2.
SMPS2 current sense input. Used for overcurrent protection and R 3 regulation.
SMPS2 output voltage sense input. Used for soft-discharge and switchover to LDO5 output.
SMPS2 feedback input used for output voltage programming and regulation.
Thermal pad. Connected to AGND internally.
7
FN6831.0
February 4, 2009
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