参数资料
型号: ISL6263BHRZ-T
厂商: Intersil
文件页数: 15/18页
文件大小: 0K
描述: IC DC/DC BUCK CTRLR 1PH 32-QFN
标准包装: 6,000
应用: 转换器,Intel IMVP-6
输入电压: 5 V ~ 25 V
输出数: 1
输出电压: 0.41 V ~ 1.29 V
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-QFN(5x5)
包装: 带卷 (TR)
ISL6263B
VDD
OCP
?
+
10 μ A
+
OCSET
VSUM
R OCSET
R S
+
DROOP
?
DFB
DROOP
?
VO
V RSNS
FIGURE 9. EQUIVALENT MODEL FOR DROOP CIRCUIT USING DISCRETE RESISTOR CURRENT SENSING
Following the evaluation board value and layout of NTC
placement will minimize the engineering time.
The current sensing traces should be routed directly to the
inductor pads for accurate DCR voltage drop measurement.
i core
Δ I core
V core Δ V core
However, due to layout imperfection, the calculated R DRP2
may still need slight adjustment to achieve optimum load line
slope. It is recommended to adjust R DRP2 after the system
has achieved thermal equilibrium at full load. For example, if
the maximum load current is 20A, one should apply a 20A
load current and look for 160mV output voltage droop. If the
voltage droop is 155mV, the new value of R DRP2 is
calculated by Equation 17:
V core
Δ V core = Δ I core × R droop
FIGURE 10. DESIRED LOAD TRANSIENT RESPONSE
WAVEFORMS
R DRP2new = ------------------- ? ( R DRP1 + R DRP2 ) – R DRP1
160mV
155mV
(EQ. 17)
For the best accuracy, the effective resistance on the DFB
and VSUM pins should be identical so that the bias current
i core
of the droop amplifier does not cause an offset voltage.
Dynamic Droop Capacitor Design Using DCR
V core
V core
Sensing
Figure 10 shows the desired waveforms during load
transient response. V CCGFX needs to follow the change in
I core as close as possible. The transient response of
V CCGFX is determined by several factors, namely the choice
of output inductor, output capacitor, compensator design,
and the design of droop capacitor C N .
If C N is designed correctly, the voltage V DROOP -V O will be
an excellent representation of the inductor current. Given the
FIGURE 11. LOAD TRANSIENT RESPONSE WHEN C N IS TOO
SMALL
i core
correct C N design, V CCGFX has the best chance of tracking
I CORE , if not, its voltage will be distorted from the actual
waveform of the inductor current and worsens the transient
V core
V core
response. Figure 11 shows the transient response when C N
is too small allowing V CCGFX to sag excessively during the
load transient. Figure 12 shows the transient response when
C N is too large. V CCGFX takes too long to droop to its final
value.
15
FIGURE 12. LOAD TRANSIENT RESPONSE WHEN C N IS TOO
LARGE
FN6388.3
July 8, 2010
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