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| 型号： | ISL6271ACRZ-T |
| 厂商： | Intersil |
| 文件页数： | 8/16页 |
| 文件大小： | 0K |
| 描述： | IC PMIC XSCALE REG 20-QFN |
| 标准包装： | 1 |
| 应用： | 处理器 |
| 电流 - 电源： | 380µA |
| 电源电压： | 2.76 V ~ 5.5 V |
| 工作温度： | -25°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VFQFN 裸露焊盘 |
| 供应商设备封装： | 20-QFN 裸露焊盘（4x4） |
| 包装： | 标准包装 |
| 产品目录页面： | 1248 (CN2011-ZH PDF) |
| 其它名称： | ISL6271ACRZ-TDKR |
ISL6271A
Operational Description
Initialization
TABLE 1. VOLTAGE-SET COMMAND BITS
I 2 C DATA BYTE OR VID PINS
Upon application of input power to the ISL6271A, the power
good signal (PGOOD) will switch from low to high after four
MSB
D3
D2
D1
LSB
D0
NOMINAL
OUTPUT
conditions are met - (1) VCC exceeds the power on reset
“rising threshold”, (2) the EN pin is high and (3) the LDO
input voltage (LVCC) is greater than 1.6V, (4) All three
outputs are in regulation. Figure 16 illustrates this start-up
sequence. The outputs are powered on under a soft-start
regime with the core output voltage defaulting to 1.3V
(unless under VID control) and the LDOs at their fixed output
levels. Once the outputs are in regulation, the ISL6271A will
respond to a voltage change command via the I 2 C bus.
When under VID control (VIDEN = HI), the Vout will rise to a
value set by VID pins. The slew rate is always fixed by the
soft-start capacitor.
Core Regulator Output
The ISL6271A core regulator is a synchronous buck
regulator that employs an Intersil proprietary switch-mode
topology known as Synthetic Ripple Regulation (SRR). The
SRR architecture is a derivative of the conventional
hysteretic-mode regulator without the inherent noise
sensitivities and dependence on output capacitance ESR.
The topology achieves excellent transient response and high
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0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
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0
0
1
1
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1
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1
0
1
0
1
0
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0
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0
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0
1
0.850
0.900
0.950
1.000
1.050
1.100
1.150
1.200
1.250
1.300
1.350
1.400
1.450
1.500
1.550
1.600
efficiency over the entire operating load range. Output
voltage ripple is typically under 5mV in Continuous
Conduction Mode (CCM) and under 10mV in DCM (diode
emulation). The output core voltage is derived from the main
SYSTEM TIMING
battery pack (typically a single cell Li-ion battery) and is
programmable in 50mV steps between 0.85 and 1.6V. The
output regulator set-point is controlled by an on-chip DAC
which receives its input either from the I 2 C bus or the VID
input pins (VID0-VID3). Table 1 identifies the VID code
VCC
BFLT#
2.8V TYP.
RISING POR
THRESHOLD
2.6V TYP.
FALLING POR
THRESHOLD
states and corresponding output voltage. To minimize core
voltage over-shoot and under-shoot between code states,
the ISL6271A implements programmable, voltage slew rate
control via the I 2 C bus. The slew rate is a function of the data
in the slew rate control register and also the soft-start
capacitor; the slew rates in Table 2 assume a soft-start
EN
I2C, SCL
Data transferred to the
reference DAC on the
rising edge of SCL
during the ACK bit
capacitor value of 10nF. Once the regulator has initialized,
the IC can be placed in a low quiescent state by pulling low
1.3V
1.0V
the EN pin. The regulator ‘remembers’ the last programmed
voltage level and slew rate after each subsequent EN cycle,
and return to the previous set-point once EN is brought high.
SOFT-START
SLEW RATE
VOUT
I 2 C PROGRAMMABLE
SLEW RATE
VPLL, VSRAM
PGOOD
FIGURE 16. SYSTEM TIMIMG DIAGRAM
8
FN9171.1
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6271AEVAL1 | 功能描述:EVALUATION BOARD FOR ISL6271A RoHS:否 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6271CR | 制造商:Rochester Electronics LLC 功能描述:PLL & SRAM REGULATOR FOR INTEL PROCESSORS - Bulk 制造商:Intersil Corporation 功能描述: |
| ISL6271EVAL1 | 制造商:Intersil Corporation 功能描述:ISL6271, PLL & SRAM REGULATOR FOR INTEL PROCESSORS EVALUATIO - Bulk |
| ISL6273 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:1.2A Low Quiescent Current 1.5MHz High Efficiency Synchronous Buck Regulator |
| ISL6273EVAL1 | 功能描述:EVAL BOARD 1 FOR ISL6273 RoHS:否 类别:编程器，开发系统 >> 评估板 - 线性稳压器 (LDO) 系列:* 产品变化通告:1Q2012 Discontinuation 30/Mar/2012 设计资源:NCP590MNDPTAGEVB Gerber Files 标准包装:1 系列:- 每 IC 通道数:2 - 双 输出电压:1.8V，2.8V 电流 - 输出:300mA 输入电压:2.1 ~ 5.5 V 稳压器类型:正，固定式 工作温度:-40°C ~ 85°C 板类型:完全填充 已供物品:板 已用 IC / 零件:NCP590MNDP 其它名称:NCP590MNDPTAGEVB-NDNCP590MNDPTAGEVBOS |
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