参数资料
| 型号： | ISL62870HRUZ-T |
| 厂商： | Intersil |
| 文件页数： | 10/16页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 16-TQFN |
| 标准包装： | 3,000 |
| 系列： | Robust Ripple Regulator™ (R³) |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 330kHz |
| 占空比： | 100% |
| 电源电压： | 3.3 V ~ 25 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -10°C ~ 100°C |
| 封装/外壳： | 16-UFQFN |
| 包装： | 带卷 (TR) |
ISL62870
converter output voltage at the FB feedback pin follows the
voltage at the SREF pin. During soft-start, the regulator always
operates in CCM until the soft-start sequence is complete.
PGOOD Monitor
The PGOOD pin indicates when the converter is capable of
UGATE
supplying regulated voltage. The PGOOD pin is an undefined
impedance if the VCC pin has not reached the rising POR
threshold V VCC_THR , or if the VCC pin is below the falling
POR threshold V VCC_THF . The PGOOD pull-down resistance
corresponds to a specific protective fault, thereby reducing
troubleshooting time and effort. Table 1 maps the pull-down
resistance of the PGOOD pin to the corresponding fault status
of the controller.
TABLE 1. PGOOD PULL-DOWN RESISTANCE
CONDITION
PGOOD RESISTANCE
1V
1V
LGATE
1V
1V
VCC Below POR
Soft-Start or Undervoltage
Overvoltage
Overcurrent
Undefined
95 Ω
65 Ω
35 Ω
FIGURE 7. GATE DRIVER ADAPTIVE SHOOT-THROUGH
Compensation Design
Figure 8 shows the recommended Type-II compensation
circuit. The FB pin is the inverting input of the error amplifier.
The COMP signal, the output of the error amplifier, is inside the
s ? R FB ? C INT ? ( 1 + s ? R COMP ? C
LGATE and UGATE MOSFET Gate-Drivers
The LGATE pin and UGATE pins are MOSFET driver
outputs. The LGATE pin drives the low-side MOSFET of the
converter while the UGATE pin drives the high-side
MOSFET of the converter.
The LGATE driver is optimized for low duty-cycle
applications where the low-side MOSFET experiences long
conduction times. In this environment, the low-side
chip and unavailable to users. C INT is a 100pF capacitor
integrated inside the IC, connecting across the FB pin and the
COMP signal. R FB , R COMP , C COMP and C INT form the Type-II
compensator. The frequency domain transfer function is given
by Equation 12:
1 + s ? ( R FB + R COMP ) ? C COMP
)
G COMP ( s ) = --------------------------------------------------------------------------------------------------------------- (EQ. 12)
COMP
MOSFETs require exceptionally low r DS(ON) and tend to
have large parasitic charges that conduct transient currents
C INT = 100pF
R COMP
C COMP
within the devices in response to high dv/dt switching
present at the phase node. The drain-gate charge in
particular can conduct sufficient current through the driver
pull-down resistance that the V GS(th) of the device can be
exceeded and turned on. For this reason, the LGATE driver
has been designed with low pull-down resistance and high
COMP
EA
-
+
FB
R OFS
R FB
V OUT
sink current capability to ensure clamping the MOSFETs
gate voltage below V GS(th) .
Adaptive Shoot-Through Protection
Adaptive shoot-through protection prevents a gate-driver
output from turning on until the opposite gate-driver output
has fallen below approximately 1V. The dead-time shown in
Figure 7 is extended by the additional period that the falling
gate voltage remains above the 1V threshold. The high-side
gate-driver output voltage is measured across the UGATE
and PHASE pins while the low-side gate-driver output
voltage is measured across the LGATE and PGND pins. The
power for the LGATE gate-driver is sourced directly from the
PVCC pin. The power for the UGATE gate-driver is supplied
by a boot-strap capacitor connected across the BOOT and
PHASE pins. The capacitor is charged each time the phase
node voltage falls a diode drop below PVCC, such as when
the low-side MOSFET is turned on.
10
SREF
FIGURE 8. COMPENSATION REFERENCE CIRCUIT
The LC output filter has a double pole at its resonant frequency
that causes rapid phase change. The R 3 modulator used in the
IC makes the LC output filter resemble a first order system in
which the closed loop stability can be achieved with the
recommended Type-II compensation network. Intersil provides
a PC-based tool that can be used to calculate compensation
network component values and help simulate the loop
frequency response.
General Application Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to design a single-phase
power converter. It is assumed that the reader is familiar with
FN6708.0
August 14, 2008
相关PDF资料 |
PDF描述 |
|---|---|
| ISL62872HRUZ-T | IC REG CTRLR BUCK PWM 20-TQFN |
| ISL62873HRUZ-T | IC REG CTRLR BUCK PWM 16UTQFN |
| ISL62875HRUZ-T | IC REG CTRLR BUCK PWM 20UTQFN |
| ISL62881CIRTZ | IC REG PWM SGL PHASE 28TQFN |
| ISL62881HRTZ | IC REG PWM SGL PHASE 28TQFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL62871 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:PWM DC/DC Controller With VID Inputs For Portable GPU Core-Voltage Regulator |
| ISL62871HRUZ | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:PWM DC/DC Controller With VID Inputs For Portable GPU Core-Voltage Regulator |
| ISL62871HRUZ-T | 功能描述:IC REG CTRLR BUCK PWM 16-TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:Robust Ripple Regulator™ (R³) 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL62872HRUZ | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:PWM DC/DC Controller With VID Inputs For Portable GPU Core-Voltage Regulator |
| ISL62872HRUZ-T | 功能描述:IC REG CTRLR BUCK PWM 20-TQFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:Robust Ripple Regulator™ (R³) 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
发布紧急采购，3分钟左右您将得到回复。