参数资料
型号: ISL6310EVAL1Z
厂商: Intersil
文件页数: 20/27页
文件大小: 0K
描述: EVALUATION BOARD FOR ISL6310
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 1.5V
电流 - 输出: 60A
输入电压: 5 ~ 12 V
稳压器拓扑结构: 降压
频率 - 开关: 400kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: ISL6310
ISL6310
L
V L (s)
DCR
I OUT
PHASE1
R S
I
INDUCTOR
L 1
V OUT
C OUT
Δ V 1
Δ V 2
PHASE2
I
L
DCR
INDUCTOR
L 2
V OUT
R S
I TRAN
ISUM
ICOMP
DROOP
C COMP
-
V DROOP
R COMP
Δ I
FIGURE 19. TIME CONSTANT MISMATCH BEHAVIOR
C 2 (OPTIONAL)
IREF
+
ISL6310
FIGURE 18. DCR SENSING CONFIGURATION
Due to errors in the inductance or DCR it may be necessary
to adjust the value of R COMP to match the time constants
correctly. The effects of time constant mismatch can be seen
in the form of droop overshoot or undershoot during the
R 1
R 2
C 1
COMP
FB
VDIFF
ISL6310
initial load transient spike, as shown in Figure 19. Follow the
R COMP , 2 = R COMP , 1 ? ----------
steps below to ensure the R-C and inductor L/DCR time
constants are matched accurately.
1. Capture a transient event with the oscilloscope set to
about L/DCR/2 (sec/div). For example, with L = 1μH and
DCR = 1m Ω , set the oscilloscope to 500μs/div.
2. Record Δ V 1 and Δ V 2 as shown in Figure 19.
3. Select a new value, R COMP,2 , for the time constant
resistor based on the original value, R COMP,1 , using
Equation 27.
Δ V 1 (EQ. 27)
Δ V 2
4. Replace R COMP with the new value and check to see that
the error is corrected. Repeat the procedure if necessary.
After choosing a new value for R COMP , it will most likely be
necessary to adjust the value of R S to obtain the desired full
load droop voltage. Use Equation 26 to obtain the new value
for R S .
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
there are two distinct methods for achieving these goals .
20
FIGURE 20. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6310 CIRCUIT
Compensating the Load Line Regulated Converter
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R 2 and C 1
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
yields a solution that is always stable with very close to ideal
transient performance.
The feedback resistor, R 1 , has already been chosen as
Select a target bandwidth for the compensated system, F 0 .
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
FN9209.4
August 7, 2008
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