参数资料
型号: ISL6420IAZ
厂商: Intersil
文件页数: 12/19页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 20-QSOP
标准包装: 580
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.4MHz
占空比: 100%
电源电压: 4.5 V ~ 16 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 20-SSOP(0.154",3.90mm 宽)
包装: 管件
ISL6420
Functional Description
Initialization
The ISL6420 automatically initializes upon receipt of power.
The Power-On Reset (POR) function monitors the internal
bias voltage generated from LDO output (VCC5) and the
ENSS pin. The POR function initiates the soft-start operation
after the VCC5 exceeds the POR threshold. The POR
function inhibits operation with the chip disabled (ENSS
pin <1V).
The device can operate from an input supply voltage of 5.6V
to 16V connected directly to the VIN pin using the internal 5V
linear regulator to bias the chip and supply the gate drivers.
For 5V ±10% applications, connect VIN to VCC5 to bypass
the linear regulator.
Soft-Start/Enable
The ISL6420 soft-start function uses an internal current
source and an external capacitor to reduce stresses and
surge current during startup.
When the output of the internal linear regulator reaches the
POR threshold, the POR function initiates the soft-start
sequence. An internal 10μA current source charges an
external capacitor on the ENSS pin linearly from 0V to 3.3V.
When the ENSS pin voltage reaches 1V typically, the
internal 0.6V reference begins to charge following the dv/dt
of the ENSS voltage. As the soft-start pin charges from 1V to
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor connected
to the drain of the upper FET and the OCSET pin programs
the overcurrent trip level. The PHASE node voltage will be
compared against the voltage on the OCSET pin, while the
upper FET is on. A current (100μA typically) is pulled from
the OCSET pin to establish the OCSET voltage. If PHASE is
lower than OCSET while the upper FET is on then an over-
current condition is detected for that clock cycle. The upper
gate pulse is immediately terminated, and a counter is incre-
mented. If an overcurrent condition is detected for
8 consecutive clock cycles, and the circuit is not in soft-start,
the ISL6420 enters into the soft-start hiccup mode. During
hiccup, the external capacitor on the ENSS pin is dis-
charged. After the capacitor is discharged, it is released and
a soft-start cycle is initiated. There are three dummy soft-
start delay cycles to allow the MOSFETs to cool down, to
keep the average power dissipation in hiccup mode at an
acceptable level. At the forth soft-start cycle, the output
starts a normal soft-start cycle, and the output tries to ramp.
During soft-start, pulse termination current limiting is
enabled, but the 8-cycle hiccup counter is held in reset until
soft-start is completed. Figure 9 shows the overcurrent hic-
cup mode.
VOUT
1.6V, the reference voltage charges from 0V to 0.6V.
Figure 8 shows a typical soft-start sequence.
IOUT
PHASE
ENSS
FIGURE 9. TYPICAL OVER-CURRENT HICCUP MODE
The overcurrent function will trip at a peak inductor current
(I OC ) determined from Equation 1, where I OCSET is the
internal OCSET current source.
I OC = ---------------------------------------------------
I OCSET ? R OCSET
R DS ( ON )
(EQ. 1)
The OC trip point varies mainly due to the upper MOSFETs
FIGURE 8. TYPICAL SOFT-START WAVEFORM
Overcurrent Protection
The overcurrent function protects the converter from a
shorted output by using the upper MOSFET’s on-resistance,
r DS(ON) to monitor the current. This method enhances the
converter ’s efficiency and reduces cost by eliminating a
current sensing resistor.
12
r DS(ON) variations. To avoid overcurrent tripping in the
normal operating load range, find the R OCSET resistor from
the equation above with:
1. The maximum r DS(ON) at the highest junction
temperature.
2. Determine I OC for I OC > I OUT ( MAX ) + ( Δ I ) ? 2 ,
where Δ I is the output inductor ripple current.
FN9151.5
February 13, 2008
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