参数资料
| 型号： | ISL6424ERZ-T |
| 厂商： | Intersil |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | IC REG DUAL LNBP TTL-INP 32-QFN |
| 标准包装： | 6,000 |
| 应用： | 转换器，卫星信号接收机顶盒设计 |
| 输入电压： | 8 V ~ 14 V |
| 输出数： | 2 |
| 输出电压： | 13 V ~ 18 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 带卷 (TR) |
ISL6424
in the standard-mode or up to 400Kbps in the fast-mode. The
level of logic “0” and logic “1” is dependent of associated value
of V DD as per electrical specification table. One clock pulse is
generated for each data bit transferred.
Data Validity
The data on the SDA line must be stable during the HIGH
period of the clock. The HIGH or LOW state of the data line
The peripheral which has been addressed has to generate
an acknowledge after the reception of each byte, otherwise
the SDA line remains at the HIGH level during the ninth
clock pulse time. In this case, the master transmitter can
generate the STOP information in order to abort the transfer.
The ISL6424 will not generate the acknowledge if the
POWER OK signal from the UVLO is LOW.
can only change when the clock signal on the SCL line is
LOW. Refer to Figure 2.
SCL
1
2
8
9
SDA
SDA
MSB
SCL
START
ACKNOWLEDGE
FROM SLAVE
DATA LINE
STABLE
CHANGE
OF DATA
FIGURE 4. ACKNOWLEDGE ON THE I 2 C BUS
DATA VALID ALLOWED
FIGURE 2. DATA VALIDITY
START and STOP Conditions
As shown in Figure 3, START condition is a HIGH to LOW
transition of the SDA line while SCL is HIGH.
The STOP condition is a LOW to HIGH transition on the SDA
line while SCL is HIGH. A STOP condition must be sent
before each START condition.
SDA
SCL
Transmission Without Acknowledge
Avoiding detection of the acknowledgement, the
microprocessor can use a simpler transmission; it waits one
clock without checking the slave acknowledging, and sends
the new data.
This approach, though, is less protected from error and
decreases the noise immunity.
ISL6424 Software Description
Interface Protocol
The interface protocol is comprised of the following, as
shown below in Table 2:
? A start condition (S)
S
START
CONDITION
P
STOP
CONDITION
? A chip address byte (MSB on left; the LSB bit determines
read (1) or write (0) transmission) (the assigned I 2 C slave
FIGURE 3. START AND STOP WAVEFORMS
Byte Format
Every byte put on the SDA line must be eight bits long. The
number of bytes that can be transmitted per transfer is
unrestricted. Each byte has to be followed by an
address for the ISL6424 is 0001 00XX)
? A sequence of data (1 byte + Acknowledge)
? A stop condition (P)
TABLE 2. INTERFACE PROTOCOL
acknowledge bit. Data is transferred with the most significant
S 0
0
0
1
0
0
0 R/W ACK
Data (8 bits)
ACK P
bit first (MSB).
Acknowledge
The master (microprocessor) puts a resistive HIGH level on
the SDA line during the acknowledge clock pulse (Figure 4).
The peripheral that acknowledges has to pull down (LOW)
the SDA line during the acknowledge clock pulse, so that the
SDA line is stable LOW during this clock pulse. (Of course,
set-up and hold times must also be taken into account.)
9
FN9175.3
September 13, 2005
相关PDF资料 |
PDF描述 |
|---|---|
| MIC49500-1.2WU | IC REG LDO 1.2V 5A TO-263-7 |
| 2510-42K | INDUCTOR RF 5.6UH UNSHIELDED SMD |
| 2510-40K | INDUCTOR RF 4.7UH UNSHIELDED SMD |
| GCB85DHHR | CONN EDGECARD 170PS .050 DIP SLD |
| MIC49500WU | IC REG LDO ADJ 5A TO-263-7 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6425ER | 功能描述:IC REG DUAL LNBP TTL-INP 32-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6425ER-T | 功能描述:IC REG DUAL LNBP TTL-INP 32-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6425ERZ | 功能描述:电流型 PWM 控制器 SINGLE LNBP SUPPLY CONTROL VG W/TTL INP RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6425ERZ-T | 功能描述:电流型 PWM 控制器 SINGLE LNBP SUPPLY CONTROL VG W/TTL INP RoHS:否 制造商:Texas Instruments 开关频率:27 KHz 上升时间: 下降时间: 工作电源电压:6 V to 15 V 工作电源电流:1.5 mA 输出端数量:1 最大工作温度:+ 105 C 安装风格:SMD/SMT 封装 / 箱体:TSSOP-14 |
| ISL6425EVAL2 | 功能描述:EVAL BOARD 2 FOR ISL6425 RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:* 标准包装:75 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.3 V ~ 13.5 V 降压:是 升压:是 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:0°C ~ 70°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:管件 产品目录页面:1051 (CN2011-ZH PDF) 其它名称:296-2543-5 |
发布紧急采购，3分钟左右您将得到回复。