参数资料
| 型号： | ISL6535CRZ |
| 厂商： | Intersil |
| 文件页数： | 9/14页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 16QFN |
| 标准包装： | 75 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1.5MHz |
| 占空比： | 100% |
| 电源电压： | 10.8 V ~ 13.2 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 16-VQFN 裸露焊盘 |
| 包装： | 管件 |
ISL6535
Locate the ISL6535 within 2 to 3 inches of the MOSFETs, Q 1
and Q 2 (1 inch or less for 500kHz or higher operation). The
circuit traces for the MOSFETs’ gate and source connections
from the ISL6535 must be sized to handle up to 3A peak
current. Minimize any leakage current paths on the SS pin
and locate the capacitor C ss close to the SS pin as the
internal current source is only 30μA. Provide local V CC
decoupling between VCC and GND pins. Locate the
capacitor C BOOT as close as practical to the BOOT pin and
the phase node.
C 2
Compensating the Converter
The ISL6535 Single-phase converter is a voltage-mode
controller. This section highlights the design consideration for a
voltage-mode controller requiring external compensation. To
address a broad range of applications, a type-3 feedback
network is recommended (see Figure 6).
Figure 7 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage is
regulated to the reference voltage level. The error amplifier
output is compared with the oscillator triangle wave to
provide a pulse-width modulated wave with an amplitude of
R 2
C 1
COMP
V IN at the PHASE node. The PWM wave is smoothed by the
output filter. The output filter capacitor bank’s equivalent
series resistance is represented by the series resistor ESR.
C 3
FB
The modulator transfer function is the small-signal transfer
R 3
R 1
VOUT
ISL6535
function of V OUT /V COMP . This function is dominated by a
DC gain and shaped by the output filter, with a double pole
break frequency at F LC and a zero at F CE . For the purpose
of this analysis, L and DCR represent the output inductance
and its DCR, while C and ESR represents the total output
FIGURE 6. COMPENSATION CONFIGURATION FOR THE
capacitance and its equivalent series resistance.
F LC = ---------------------------
F CE = ---------------------------------
ISL6535 CIRCUIT
1
2 π ? L ? C
1
2 π ? C ? ESR
(EQ. 7)
C 2
The compensation network consists of the error amplifier
(internal to the ISL6535) and the external R 1 to R 3 , C 1 to C 3
components. The goal of the compensation network is to
COMP
R 2
C 1
R 3
C 3
provide a closed loop transfer function with high 0dB crossing
frequency (F 0 ; typically 0.1 to 0.3 of f SW ) and adequate phase
-
margin (better than 45°). Phase margin is the difference
E/A
+
FB
R 1
between the closed loop phase at F 0dB and 180°. The
equations that follow relate the compensation network’s poles,
VREF
GND
zeros and gain to the components (R 1 , R 2 , R 3 , C 1 , C 2 , and
C 3 ) in Figures 6 and 7. Use the following guidelines for
locating the poles and zeros of the compensation network:
1. Select a value for R 1 (1k Ω to 10k Ω , typically). Calculate
value for R 2 for desired converter bandwidth (F 0 ). If
setting the output voltage to be equal to the reference set
voltage, as shown in Figure 7, the design procedure can
OSCILLATOR
V OUT
be followed as presented.
D MAX ? V IN ? F LC
PWM
V OSC
V IN
V OSC ? R 1 ? F 0
R 2 = ----------------------------------------------
(EQ. 8)
CIRCUIT
UGATE
L
DCR
As the ISL6535 supports 100% duty cycle, D MAX equals 1.
The ISL6535 uses a fixed ramp amplitude (V OSC ) of 1.9V,
HALF-BRIDGE
Equation 8 simplifies to Equation 9:
V IN ? F LC
DRIVE
PHASE
C
1.9 ? R 1 ? F 0
R 2 = -------------------------------
(EQ. 9)
LGATE
ESR
2. Calculate C 1 such that F Z1 is placed at a fraction of the F LC ,
at 0.1 to 0.75 of F LC (to adjust, change the 0.5 factor in
ISL6535
EXTERNAL CIRCUIT
Equation 10 to the desired number). The higher the quality
factor of the output filter and/or the higher the ratio F CE /F LC ,
FIGURE 7. VOLTAGE-MODE BUCK CONVERTER
COMPENSATION DESIGN
9
the lower the F Z1 frequency (to maximize phase boost at
F LC ).
FN9255.1
May 5, 2008
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| ISL6535CRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 16-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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| ISL6535IRZ | 功能描述:IC REG CTRLR BUCK PWM VM 16QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6535IRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 16-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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