参数资料
型号: ISL6537A
厂商: Intersil Corporation
英文描述: ACPI Regulator/Controller for Dual Channel DDR Memory Systems
中文描述: ACPI的稳压器/双通道DDR内存控制器系统
文件页数: 1/15页
文件大小: 488K
代理商: ISL6537A
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6537A
ACPI Regulator/Controller for
Dual Channel DDR Memory Systems
The ISL6537A provides a complete ACPI compliant power
solution for up to 4 DIMM dual channel DDR/DDR2 Memory
systems. Included are both a synchronous buck controller to
supply VDDQ during S0/S1 and S3 states. During S0/S1 state,
a fully integrated sink-source regulator generates an accurate
(VDDQ/2) high current VTT voltage without the need for a
negative supply. A buffered version of the VDDQ/2 reference is
provided as VREF. A second PWM controller, which requires
external MOSFET drivers, is available for regulation of the
GMCH Core voltage. An LDO controller is also integrated for
the CPU VTT termination voltage regulation and the DAC.
The switching PWM controller drives two N-Channel
MOSFETs in a synchronous-rectified buck converter
topology. The synchronous buck converter uses voltage-
mode control with fast transient response. The switching
regulator provides a maximum static regulation tolerance of
±
2% over line, load, and temperature ranges. The output is
user-adjustable by means of external resistors down to 0.8V.
An integrated soft-start feature brings all outputs into
regulation in a controlled manner when returning to S0/S1
state from any sleep state. During S0 the VIDPGD signal
indicates that the GMCH and CPU VTT termination voltage
is within spec and operational.
All outputs, except VDAC, have undervoltage protection.
The switching regulator also has overvoltage and
overcurrent protection. Thermal shutdown is integrated.
Pinout
ISL6537A (QFN)
TOP VIEW
Features
Generates 5 Regulated Voltages
- Synchronous Buck PWM Controller for DDR VDDQ
- 3A Integrated Sink/Source Linear Regulator with
Accurate VDDQ/2 Divider Reference for DDR VTT
- PWM Regulator for GMCH Core
- LDO Regulator for CPU/GMCH VTT Termination
- LDO Regulator for DAC
ACPI compliant sleep state control
Glitch-free Transitions During State Changes
Integrated VREF Buffer
VDDQ PWM Controller Drives Low Cost N-Channel
MOSFETs
250kHz Constant Frequency Operation
- Both PWM controllers are Phase Shifted 180°
Tight Output Voltage Regulation
- All Outputs: ±2% Over Temperature
Fully-Adjustable Outputs with Wide Voltage Range: Down
to 0.8V supports DDR and DDR2 Specifications
Simple Single-Loop Voltage-Mode PWM Control Design
Fast PWM Converter Transient Response
Under and Overvoltage Monitoring
OCP on the VDDQ Switching Regulator
Integrated Thermal Shutdown Protection
Pb-Free Available (RoHS Compliant)
Applications
Single and Dual Channel DDR Memory Power Systems in
ACPI compliant PCs
Graphics cards - GPU and memory supplies
ASIC power supplies
Embedded processor and I/O supplies
DSP supplies
5VSBY
S3#
P12V
GND
DDR_VTT
VDDQ
DRIVE3
FB3
PWM4
FB4
COMP4
COMP
FB
LG
A
T
E
GN
D
UGA
T
E
BOOT
PHA
S
E
S5
#
OC
SE
T
V
DDQ
DDR
_V
TTS
NS
DR
IVE
2
FB
2
VID
P
GD
VR
EF_
O
UT
VR
EF_IN
1
2
3
4
5
6
7
21
20
28
27
26
25
24
23
22
89
GND
29
19
18
17
16
15
10
11
12
13
14
Ordering Information
PART NUMBER
TEMP. RANGE
(°C)
PACKAGE
PKG.DWG.
#
ISL6537ACR
0 to 70
28 Ld 6x6 QFN
L28.6x6
ISL6537ACRZ
(See Note)
0 to 70
28 Ld 6x6 QFN
(Pb-free)
L28.6x6
*Add “-T” suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish, which are
RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Data Sheet
February 9, 2005
FN9143.3
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