参数资料
| 型号： | ISL6556ACR-T |
| 厂商： | Intersil |
| 文件页数： | 12/25页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR MULTIPHASE VRM10 32-QFN |
| 标准包装： | 6,000 |
| 应用： | 控制器，Intel VR10X |
| 输入电压： | 3 V ~ 12 V |
| 输出数： | 4 |
| 输出电压： | 0.84 V ~ 1.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
| 包装： | 带卷 (TR) |
ISL6556A
Channel-Current Balance
The sampled current, I n , from each active channel is used to
gauge both overall load current and the relative channel
current carried in each leg of the converter. The individual
sample currents are summed and divided by the number of
active channels. The resulting average current, I AVG ,
provides a measure of the total load current demand on the
converter and the appropriate level of channel current. Using
Figures 3 and 4, the average current is defined as
to cool more effectively than the other(s) due to nearby air
flow or heat sinking components. The other channel(s) may
have more difficulty cooling with comparatively less air flow
and heat sinking. The hotter channels may also be located
close to other heat-generating components tending to drive
their temperature even higher. In these cases, the proper
selection of the current sense resistors (R ISEN in Figure 3)
introduces channel current unbalance into the system.
Increasing the value of R ISEN in the cooler channels and
I 1 + I 2 + + I N
I AVG = ----------------------------------------
N
…
(EQ. 4)
decreasing it in the hotter channels moves all channels into
thermal balance at the expense of current balance.
Voltage Regulation
I AVG = ------------- ---------------------- )
R ISEN
I OUT r DS ( ON
N
where N is the number of active channels and I OUT is the
total load current.
The integrating compensation network shown in Figure 5
assures that the steady-state error in the output voltage is
limited only to the error in the reference voltage (output of
the DAC) and offset errors in the OFS current source,
remote-sense and error amplifiers. Intersil specifies the
V COMP
+
-
+
-
PWM1
guaranteed tolerance of the ISL6556A to include the
combined tolerances of each of these elements.
The output of the error amplifier, V COMP , is compared to the
f(j ω )
I ER
SAWTOOTH SIGNAL
I 4 *
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Intersil MOSFET drivers and
regulate the converter output to the specified reference
-
I AVG
÷ N
Σ
I 3 *
voltage. The internal and external circuitry that controls
voltage regulation is illustrated in Figure 5.
+
I 2
EXTERNAL CIRCUIT
ISL6556A INTERNAL CIRCUIT
I 1
R C
C C
COMP
NOTE: *Channels 3 and 4 are optional.
FIGURE 4. CHANNEL-1 PWM FUNCTION AND CURRENT-
DAC
BALANCE ADJUSTMENT
The average current is subtracted from the individual
C REF
R REF
REF
+
channel sample currents. The resulting error current, I ER , is
filtered to modify V COMP . The modified V COMP signal is
FB
-
V COMP
compared to a sawtooth ramp signal to produce a modified
pulse width which corrects for any unbalance and drives the
error current toward zero. Figure 4 illustrates Intersil’s
R FB
+
V DROOP
-
VDIFF
ERROR AMPLIFIER
I AVG
patented current-balance method as implemented on
channel-1 of a multi-phase converter.
Two considerations designers face are MOSFET selection
and inductor design. Both are significantly improved when
V OUT +
V OUT -
VSEN
RGND
+
-
channel currents track at any load level. The need for
complex drive schemes for multiple MOSFETs, exotic
magnetic materials, and expensive heat sinks is avoided,
resulting in a cost-effective and easy-to-implement solution
relative to single-phase conversion. Channel-current
balance insures that the thermal advantage of multi-phase
conversion is realized. Heat dissipation in multiple channels
is spread over a greater area than can easily be
accomplished using the single phase approach.
In some circumstances, it may be necessary to deliberately
design some channel-current unbalance into the system. In
a highly compact design, one or two channels may be able
12
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
FIGURE 5. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
The ISL6556A incorporates an internal differential remote-
sense amplifier in the feedback path. The amplifier removes
the voltage error encountered when measuring the output
voltage relative to the local controller ground reference point
resulting in a more accurate means of sensing output
voltage. Connect the microprocessor sense pins to the non-
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6556ACRZ | 功能描述:IC CTRLR MULTIPHASE VRM10 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6556ACRZ-T | 功能描述:IC CTRLR MULTIPHASE VRM10 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6556ACRZ-TR5208 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL6556BCB | 功能描述:IC CTRLR MULTIPHASE VRM10 28SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6556BCB-T | 功能描述:IC CTRLR MULTIPHASE VRM10 28SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
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