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参数资料
| 型号： | ISL6559EVAL2 |
| 厂商： | Intersil |
| 文件页数： | 4/12页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD 2 ISL6559 |
| 标准包装： | 1 |
| 主要目的： | 特殊用途 DC/DC，VRM 电源 |
| 输出及类型： | 1，非隔离 |
| 功率 - 输出： | 67.6W |
| 输出电压： | 1.3V |
| 电流 - 输出： | 52A |
| 输入电压： | 5V，12V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 250kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | HIP6601，ISL6559 |
Application Note 1137
transient load current. As the load is removed, the output
voltage rises in response. The controller detects the load
change and immediately decreases the channel duty cycles.
The duty cycle of PWM1 is reduced to zero for one cycle as
those of the other two channels are notably reduced. During
this time, the inductors quickly shed load current, and once
again reduce the amount of capacitance required to supply
the load. The core voltage returns to the no-load offset level
of 1.320V.
and PGOOD remains low. The controller waits another
8.3ms before another soft-start interval is attempted. This
hiccup mode of operation repeats up to seven times, with the
eighth prompting the converter to latch off.
Figure 5 shows the hiccup mode operation of the converter
when a hard short is applied across the output terminals of
the evaluation board. The converter quickly places the PWM
signals in a high-impedance state and the core voltage
decays quickly. The short is not removed, resulting in the
controller latching off after the seventh attempt.
1.30V
20A
VCORE, 50mV/DIV
1.0V
VCORE, 1V/DIV
LOAD CURRENT, 20A/DIV
LOAD CURRENT, 10A/DIV
0A
0A
PWM1, 10V/DIV
I L1 , 5A/DIV
I L2 , 5A/DIV
I L3 , 5A/DIV
0V
PWM2, 10V/DIV
0V
PWM3, 10V/DIV
0V
10ms/DIV
PWM1, 10V/DIV
FIGURE 5. OVER-CURRENT PROTECTION
0V
0V
0V
PWM2, 10V/DIV
PWM3, 10V/DIV
5 μ s/DIV
VID on the Fly
The AMD Hammer Family microprocessors can change VID
inputs at any time while the regulator is in operation. The
power management solution is required to monitor the DAC
inputs, and respond to VID voltage transitions in a controlled
FIGURE 4. FALLING EDGE TRANSIENT RESPONSE
Over-Current Protection
The ISL6559 monitors the output current level by averaging
the sampled current from each ISEN pin. The R ISEN
resistors (R1, R2, R3) are selected so that the current
sourced by the ISEN pins, at maximum load current, is
50 μ A. The average of the sampled currents is compared
with an over-current trip level of 90 μ A. Once the average
current meets or exceeds the OC reference current, the
controller immediately places all PWM signals in a high-
impedance state, quickly removing gate drive to the
HIP6601B drivers, and forcing the core voltage to decay as
the output capacitors discharge. The PGOOD signal
transitions low when the core voltage drops below the UV
threshold.
After the over-current event is detected, the controller waits
a short delay time before initiating a soft-start interval to
allow the disturbance to clear. The delay time is equivalent to
the soft-start interval and is 8.3ms, for this design. If during
the soft-start interval another over-current trip is detected,
the PWM signals are again placed in a high impedance state
4
manner, supervising the safe output voltage transition within
the DAC range of the processor without discontinuity or
disruption. The ISL6559 checks the five VID inputs at the
beginning of each switching cycle. If the VID code has
changed, the controller waits one complete switching cycle
to validate the new code. If the new code is stable during this
one cycle delay, then the controller begins incrementing the
reference voltage toward the new DAC code in 25mV steps,
every two switching-cycles, until the new DAC code is
reached.
Figure 6 shows a 250mV DAC change prompted by
changing VID3 and VID1 simultaneously. Originally, at
1.550V (00000), the core voltage ramps down to the new
DAC setting of 1.300V (01010). The VID-on-the-Fly
transition is completed in 80 μ s, well within the 100 μ s
maximum window allowed. The converter is supporting a
26A load during the transition. The PGOOD signal is steady
throughout the DAC change and indicates no operational
problems are encountered.
相关PDF资料 |
PDF描述 |
|---|---|
| ISL6562EVAL1 | EVALUATION BOARD ISL6562 |
| ISL6594BCRZ-T | IC MOSFET DVR SYNC BUCK 10-DFN |
| ISL6594DCRZ | IC MOSFET DRVR SYNC BUCK 10-DFN |
| ISL6596IBZ | IC MOSFET DRVR SYNC BUCK 8-SOIC |
| ISL6597CRZ | IC MOSFET DRVR DUAL SYNC 16-QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6560 WAF | 制造商:Intersil Corporation 功能描述: |
| ISL6560C WAF | 制造商:Intersil Corporation 功能描述: |
| ISL6560CB | 功能描述:IC REG CTRLR BUCK PWM CM 16-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,000 系列:- PWM 型:电压模式 输出数:1 频率 - 最大:1.5MHz 占空比:66.7% 电源电压:4.75 V ~ 5.25 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:40-VFQFN 裸露焊盘 包装:带卷 (TR) |
| ISL6560CB-T | 功能描述:IC REG CTRLR BUCK PWM CM 16-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,000 系列:- PWM 型:电压模式 输出数:1 频率 - 最大:1.5MHz 占空比:66.7% 电源电压:4.75 V ~ 5.25 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:40-VFQFN 裸露焊盘 包装:带卷 (TR) |
| ISL6560CBZ | 功能描述:IC REG CTRLR BUCK PWM CM 16-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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