参数资料
型号: ISL6566AIRZ
厂商: Intersil
文件页数: 14/28页
文件大小: 0K
描述: IC CTRLR PWM 3PHASE BUCK 40-QFN
标准包装: 500
应用: 控制器,Intel VRM9,VRM10,AMD Hammer 应用
输入电压: 3 V ~ 12 V
输出数: 1
输出电压: 0.8 V ~ 1.6 V
工作温度: -40°C ~ 85°C
安装类型: *
封装/外壳: 40-VFQFN 裸露焊盘
供应商设备封装: *
包装: 管件
ISL6566A
(EQ. 6)
? ------------- + 1 ?
? DCR
COMP
V ( s ) = -------------------------------------------------------------------------- ? ----------------------- ? ( I + I + I ) ? DCR
( s ? R COMP ? C COMP + 1 )
RS
V DROOP = --------------------- ? I OUT ? DCR
in Figure 7, the voltage drop across all of the inductors DCRs
can be extracted. The output of the current sense amplifier,
V DROOP , can be shown to be proportional to the channel
currents I L1 , I L2 , and I L3 , shown in Equation 6.
s ? L
? R
DROOP L1 L2 L3
If the R-C network components are selected such that the
R-C time constant matches the inductor L/DCR time
constant, then V DROOP is equal to the sum of the voltage
drops across the individual DCRs, multiplied by a gain. As
Equation 7 shows, V DROOP is therefore proportional to the
total output current, I OUT .
R COMP (EQ. 7)
R S
Note: An optional 10nF ceramic capacitor from the ISUM pin
to the IREF pin is recommended to help reduce any noise
affects on the current sense amplifier due to layout.
Output-Voltage Offset Programming
The ISL6566A allows the designer to accurately adjust the
offset voltage by connecting a resistor, R OFS , from the OFS
pin to VCC or GND. When R OFS is connected between OFS
and VCC, the voltage across it is regulated to 1.5V. This
causes a proportional current (I OFS ) to flow into the OFS pin
and out of the FB pin. If R OFS is connected to ground, the
voltage across it is regulated to 0.5V, and I OFS flows into the
FB pin and out of the OFS pin. The offset current flowing
through the resistor between VDIFF and FB will generate the
desired offset voltage which is equal to the product (I OFS x
R FB ). These functions are shown in Figures 8 and 9.
VDIFF
DCR
DCR
PHASE3
To External Driver
PHASE Pin
R S
I
V L (s)
L
INDUCTOR
L 3
L
I OUT
V OUT
C OUT
+
V OFS
-
R FB
FB
I OFS
VREF
E/A
PHASE2
R S
INDUCTOR
IL 2
L
DCR
PHASE1
ISUM
R S
INDUCTOR
IL 1
R OFS
OFS
ISL6566A
+
-
0.5V
-
+
1.5V
GND
GND
VCC
-
ICOMP
C COMP
R COMP
FIGURE 8. POSITIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
V DROOP
+
IREF
(optional)
ISL6566A
FIGURE 7. DCR SENSING CONFIGURATION
By simply adjusting the value of R S , the load line can be set
to any level, giving the converter the right amount of droop at
all load currents. It may also be necessary to compensate for
any changes in DCR due to temperature. These changes
cause the load line to be skewed, and cause the R-C time
constant to not match the L/DCR time constant. If this
becomes a problem a simple negative temperature
coefficient resistor network can be used in the place of
R COMP to compensate for the rise in DCR due to
temperature.
14
FN9200.2
July 27, 2005
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