参数资料
| 型号： | ISL6568IR |
| 厂商： | Intersil |
| 文件页数： | 22/30页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR PWM BUCK 2PHASE 32-QFN |
| 标准包装： | 60 |
| 应用： | 控制器，Intel VRM9，VRM10，AMD Hammer 应用 |
| 输入电压： | 3 V ~ 12 V |
| 输出数： | 1 |
| 输出电压： | 0.84 V ~ 1.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页当前第22页第23页第24页第25页第26页第27页第28页第29页第30页
ISL6568
PVCC
C GD
D
V IN
CHANNEL N
UPPER MOSFET
R HI2
R LO2
LGATE
G
R G2
R GI2
C GS
C DS
Q2
ISEN(n)
R ISEN
I L
S
-
L DS ( ON )
ISL6568
+
I
r
R ISEN = ----------------------- )
r DS ( ON I FL (EQ. 24)
50 × 10 – 6
FIGURE 16. TYPICAL LOWER-GATE DRIVE TURN-ON PATH
The total gate drive power losses are dissipated among the
resistive components along the transition path and in the
bootstrap diode. The portion of the total power dissipated in the
controller itself is the power dissipated in the upper drive path
resistance, P DR_UP , the lower drive path resistance, P DR_UP , and
in the boot strap diode, P BOOT . The rest of the power will be
dissipated by the external gate resistors (R G1 and R G2 ) and the
internal gate resistors (R GI1 and R GI2 ) of the MOSFETs. Figures 15
and 16 show the typical upper and lower gate drives’ turn-on
transition path. The total power dissipation in the controller itself,
P DR , can be roughly estimated as Equation 23:
CHANNEL N
LOWER MOSFET
FIGURE 17. ISL6568 INTERNAL AND EXTERNAL
CURRENT-SENSING CIRCUITRY
Select values for these resistors based on the room
temperature r DS(ON) of the lower MOSFETs; the full-load
operating current, I FL ; and the number of phases, N using
Equation 24.
--------
N
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistors. When the components of
P DR = P DR_UP + P DR_LOW + P BOOT + ( I Q ? VCC )
(EQ. 23)
one or more channels are inhibited from effectively dissipating
their heat so that the affected channels run hotter than desired,
P BOOT = ---------------------
P DR_UP = ? -------------------------------------- + ---------------------------------------- ? ? ---------------------
? R HI1 + R EXT1 R LO1 + R EXT1 ?
P DR_LOW = ? ? ? ---------------------
? R HI2 + R EXT2 R LO2 + R EXT2 ?
R EXT1 = R G1 + ------------- R EXT2 = R G2 + -------------
N N
Δ T
R ISEN , 2 = R ISEN ---------- 2
P Qg_Q1
3
? R HI1 R LO1 ? P Qg_Q1
3
? R HI2 R LO2 ? P Qg_Q2
-------------------------------------- + ----------------------------------------
2
R GI1 R GI2
Q1 Q2
Current Balancing Component Selection
The ISL6568 senses the channel load current by sampling the
voltage across the lower MOSFET r DS(ON) , as shown in
Figure 17. The ISEN pins are denoted ISEN1 and ISEN2. The
resistors connected between these pins and the respective
phase nodes determine the gains in the channel-current
balance loop.
22
choose new, smaller values of R ISEN for the affected phases
page 11). Choose R ISEN,2 in proportion to the desired decrease
in temperature rise in order to cause proportionally less current
to flow in the hotter phase.
(EQ. 25)
Δ T 1
In Equation 25, make sure that Δ T 2 is the desired temperature
rise above the ambient temperature, and Δ T 1 is the measured
temperature rise above the ambient temperature. While a
single adjustment according to Equation 25 is usually sufficient,
it may occasionally be necessary to adjust R ISEN two or more
times to achieve optimal thermal balance between all channels.
Load Line Regulation Component Selection
(DCR Current Sensing)
For accurate load line regulation, the ISL6568 senses the total
output current by detecting the voltage across the output
inductor DCR of each channel (see “Load-Line (Droop)
network is required to accurately sense the inductor DCR
voltage and convert this information into a “droop” voltage,
which is proportional to the total output current.
FN9187.5
January 12, 2012
相关PDF资料 |
PDF描述 |
|---|---|
| GMA18DRMD | CONN EDGECARD 36POS .125 SQ WW |
| GCC40DREI-S93 | CONN EDGECARD 80POS .100 EYELET |
| ISL6568CR-T | IC CTRLR PWM BUCK 2PHASE 32-QFN |
| ESM15DTKN | CONN EDGECARD 30POS DIP .156 SLD |
| ISL6568CR | IC CTRLR PWM BUCK 2PHASE 32-QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6568IR-T | 功能描述:IC CTRLR PWM BUCK 2PHASE 32-QFN RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,000 系列:- 应用:电源，ICERA E400，E450 输入电压:4.1 V ~ 5.5 V 输出数:10 输出电压:可编程 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:42-WFBGA，WLCSP 供应商设备封装:42-WLP 包装:带卷 (TR) |
| ISL6568IRZ | 功能描述:IC CTRLR PWM BUCK 2PHASE 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6568IRZA | 功能描述:IC CTRLR PWM BUCK 2PHASE 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6568IRZA-T | 功能描述:IC CTRLR PWM BUCK 2PHASE 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
| ISL6568IRZR5184 | 功能描述:IC CTRLR PWM 2PHASE BUCK 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 专用型 系列:- 标准包装:43 系列:- 应用:控制器，Intel VR11 输入电压:5 V ~ 12 V 输出数:1 输出电压:0.5 V ~ 1.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:48-VFQFN 裸露焊盘 供应商设备封装:48-QFN（7x7） 包装:管件 |
发布紧急采购，3分钟左右您将得到回复。