参数资料
型号: ISL6568IR
厂商: Intersil
文件页数: 6/30页
文件大小: 0K
描述: IC CTRLR PWM BUCK 2PHASE 32-QFN
标准包装: 60
应用: 控制器,Intel VRM9,VRM10,AMD Hammer 应用
输入电压: 3 V ~ 12 V
输出数: 1
输出电压: 0.84 V ~ 1.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-QFN(5x5)
包装: 管件
ISL6568
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Supply Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +15V
Absolute Boot Voltage, V BOOT . . . . . . . . . . . . . . . . GND - 0.3V to GND + 36V
Phase Voltage, V PHASE . . . . . . . . . . . . . . . . GND - 0.3V to 15V (PVCC = 12)
GND - 8V (<400ns, 20μJ) to 24V (<200ns, V BOOT-PHASE = 12V)
Upper Gate Voltage, V UGATE . . . . . . . . . . . . V PHASE - 0.3V to V BOOT + 0.3V
V PHASE - 3.5V (<100ns Pulse Width, 2μJ) to V BOOT + 0.3V
Lower Gate Voltage, V LGATE . . . . . . . . . . . . . . . .GND - 0.3V to PVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2μJ) to PVCC+ 0.3V
Input, Output, or I/O Voltage . . . . . . . . . . . . . . . . . GND - 0.3V to VCC + 0.3V
ESD Classification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD
Thermal Information
Thermal Resistance θ JA (°C/W) θ JC (°C/W)
QFN Package (Notes 4, 5) . . . . . . . . . . . . . . 35 5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%
PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V to 12V ±5%
Ambient Temperature
ISL6568CRZ, ISL6568CRZR5184 . . . . . . . . . . . . . . . . . . . 0°C to +70°C
ISL6568IRZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θ JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For θ JC , the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Specified. Boldface limits apply over the operating
temperature ranges, 0°C to +70°C and -40°C to +85°C.
MIN
MAX
PARAMETER
TEST CONDITIONS
(Note 6)
TYP
(Note 6)
UNITS
BIAS SUPPLY AND INTERNAL OSCILLATOR
Input Bias Supply Current
Gate Drive Bias Current
VCC POR (Power-On Reset) Threshold
PVCC POR (Power-On Reset) Threshold
Oscillator Ramp Amplitude (Note 6)
Maximum Duty Cycle (Note 6)
Oscillator Frequency, F SW
I VCC ; ENLL = high
I PVCC ; ENLL = high
VCC Rising
VCC Falling
PVCC Rising
PVCC Falling
V P-P
R T = 100k Ω (±0.1%)
-
-
4.25
3.75
4.25
3.60
-
-
225
15
1.5
4.38
3.88
4.38
3.88
1.50
66.6
250
20
-
4.50
4.00
4.50
4.00
-
-
275
mA
mA
V
V
V
V
V
%
kHz
CONTROL THRESHOLDS
ENLL Rising Threshold
ENLL Hysteresis
-
-
0.66
100
-
-
V
mV
COMP Shutdown Threshold
COMP Falling
0.2
0.3
0.4
V
REFERENCE AND DAC
System Accuracy (VID = 1.0V - 1.850V)
System Accuracy (VID = 0.8V - 1.0V)
DAC Input Low Voltage (VR9, VR10)
DAC Input High Voltage (VR9, VR10)
DAC Input Low Voltage (AMD)
DAC Input High Voltage (AMD)
-0.5
-0.8
-
0.8
-
1.0
-
-
-
-
-
-
0.5
0.8
0.4
-
0.6
-
%
%
V
V
V
V
OFS Sink Current Accuracy (Negative Offset)
OFS Source Current Accuracy (Positive Offset)
R OFS = 30k Ω from OFS to VCC
R OFS = 10k Ω from OFS to GND
47.5
47.5
50.0
50.0
52.5
52.5
μA
μA
6
FN9187.5
January 12, 2012
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