参数资料
| 型号： | ISL6720AARZ |
| 厂商： | Intersil |
| 文件页数： | 9/11页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 5V/ADJ 11-DFN |
| 标准包装： | 75 |
| 稳压器拓扑结构： | 正，固定式和可调式 |
| 输出电压： | 5V，0 V ~ 20 V，0 V ~ 15 V |
| 输入电压： | 18 V ~ 80 V |
| 稳压器数量： | 3 |
| 电流 - 输出： | 25mA（最小），125mA（最小），50mA（最小） |
| 电流 - 限制（最小）： | 30mA，225mA，80mA |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 11-VFDFN 裸露焊盘 |
| 供应商设备封装： | 11-DFN（4x4） |
| 包装： | 管件 |
ISL6720A
.
VIO 11
ISL6720A
N/C 10
+
TRACE 1 1
VADJ 9
VSW 8
VSWCOMP 7
ENABLE 6
FIGURE 6. ISOLATING VIO FROM LARGE CAPACITANCES
VSW
VSW is the switched output and may be turned on and off
using the ENABLE pin (GND = off). The output is adjustable
from 1.5V to 15V, but must always be at least 1.5V lower
than VIO and 5.5V lower than VPWR. VSW uses VIO as its
input source. If the external source applied to VIO is unable
to supply adequate voltage, VPWR will be selected as an
alternate source for VIO (and VSW). VSW is capable of
sourcing up to 50mA continuously, and up to 80mA on a
transient basis.
The output voltage is adjusted using the VSWADJ input. The
voltage applied to this pin, multiplied by an internal gain of 7,
sets the output voltage.
TRACE 3
TRACE 2
FIGURE 7. VSW TRANSIENT RESPONSE, 0mA to 50mA
STEP, TRACE1: VSW, TRACE2: VCONT,
TRACE3: VIO
VSW = 7 × VSWADJ
V
(EQ. 2)
TRACE 1
With a 220pF capacitor from VSW to VSWCOMP, the load
capacitance on VSW should be 1.0μF nominal, with a range
of 0.47μF to 1.5μF. VSW requires a minimum load of
500μA. These conditions must be met even if the VSW
output is not used.
VCONT
VCONT, which has a tight tolerance output and can source
25mA, is a continuos output. It remains on during most fault
conditions and precedes VIO and VSW during power-up. It
may be used as reference for other circuitry, or may be used
TRACE 3
TRACE 2
to power a micro-controller or other similar device.
VCONT selects VIO as its primary source voltage, but also
uses VPWR if VIO is not present or capable.
FIGURE 8. VCONT TRANSIENT RESPONSE, 0mA to 25mA
VIO must have at least 5V of headroom above VCONT or
VPWR is selected as the source. VCONT is enabled when
VPWR exceeds its UVLO threshold and its operation
precedes the enabling of VIO and VSW by 250 μ s, nominal.
VCONT requires a minimum 250 μ A load for stability. It
should be bypassed to GND with a 1μF capacitor and
requires a 1nF compensation capacitor between VCOMP
and VCONT. These conditions must be met even if the
VCONT output is not used.
9
STEP, TRACE1: VSW, TRACE2: VCONT,
TRACE3: VIO
Figure 7 depicts the output deviation on each output when
VSW experiences a 0mA to 50 mA step load. VIO Is
unloaded without back-bias and VCONT has a 250 μ A
(minimum) load.
Figure 8 depicts the output deviation on each output when
VCONT experiences a 0mA to 25mA step load. VIO Is
unloaded without back-bias and VSW has a 500 μ A
(minimum) load.
FN6487.1
August 23, 2007
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