参数资料
型号: ISL6740AIVZA
厂商: Intersil
文件页数: 8/14页
文件大小: 0K
描述: IC REG CTRLR PWM VM 16-TSSOP
标准包装: 960
PWM 型: 电压模式
输出数: 1
频率 - 最大: 2MHz
占空比: 100%
电源电压: 9 V ~ 16 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 105°C
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
包装: 管件
ISL6740A
Typical Performance Curves
1.001
1
65
60
55
0.999
50
0.998
45
0.997
-40
-25 -10
5
20
35
50
65
80
95 110
40
0
50
100 150 200 250 300 350 400 450
500
TEMPERATURE (°C)
FIGURE 1. REFERENCE VOLTAGE vs TEMPERATURE
RTD CURRENT (μA)
FIGURE 2. OSCILLATOR CT DISCHARGE CURRENT GAIN
1?10 4
CT (pF) =
1?10 6
1000
680
470
1?10 3 330
220
100
100
1?10 5
RTD = 10k
CT (pF) =
100
220
330
680
1?10 4
10
10
20
30
40
50
60
70
80
90
100
470
10 20 30
40
50
1000
60
70
80
90
100
RTD (k Ω )
FIGURE 3. DEADTIME (DT) vs CAPACITANCE
Pin Descriptions
V DD - V DD is the power connection for the IC. To optimize noise
immunity, bypass V DD to GND with a ceramic capacitor as
close to the V DD and GND pins as possible.
The total supply current, I DD , will be dependent on the load
applied to outputs OUTA and OUTB. Total I DD current is the
sum of the quiescent current and the average output current.
Knowing the operating frequency, Fsw, and the output loading
capacitance charge, Q, per output, the average output current
can be calculated from:
RTC (k Ω )
FIGURE 4. CAPACITANCE vs FREQUENCY
an external clock with a pulse width less than one-half of the
oscillator period must be used.
R TC - This is the oscillator timing capacitor charge current
control pin. A resistor is connected between this pin and GND.
The current flowing through the resistor determines the
magnitude of the charge current. The charge current is
nominally twice this current. The PWM maximum ON time is
determined by the timing capacitor charge duration. The
voltage appearing on this pin is nominally 80% of the voltage
I OUT = 2 ? Q ? F SW
A
(EQ. 1)
applied to the UV/FF pin.
SYNC - A bidirectional synchronization signal used to
coordinate the switching frequency of multiple units.
Synchronization may be achieved by connecting the SYNC
signal of each unit together or by using an external master
clock signal. The oscillator timing capacitor, C T , is always
required regardless of the synchronization method used. The
paralleled unit with the highest oscillator frequency assumes
control. Self-synchronization is not recommended for oscillator
frequencies above 900kHz. For higher switching frequencies,
8
R TD - This is the oscillator timing capacitor discharge current
control pin. A resistor is connected between this pin and GND.
The current flowing through the resistor determines the
magnitude of the discharge current. The discharge current is
nominally 50x this current. The PWM deadtime is determined
by the timing capacitor discharge duration. The voltage
appearing on this pin is nominally 80% of the voltage applied
to the UV/FF pin.
C T - The oscillator timing capacitor is connected between this
pin and GND.
FN9195.3
February 9, 2012
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