- 您现在的位置：买卖IC网 > PDF目录15524 > ISL6742AAZA (Intersil)IC REG CTRLR PWM CM/VM 16-QSOP PDF资料下载
参数资料
| 型号： | ISL6742AAZA |
| 厂商： | Intersil |
| 文件页数： | 12/18页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR PWM CM/VM 16-QSOP |
| 标准包装： | 98 |
| PWM 型： | 电流/电压模式 |
| 输出数： | 4 |
| 频率 - 最大： | 2MHz |
| 占空比： | 100% |
| 电源电压： | 9 V ~ 16 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 包装： | 管件 |
| 产品目录页面： | 1243 (CN2011-ZH PDF) |
ISL6742
intervention of the control loop. Voltage feed-forward is often
implemented in voltage-mode control loops, but is redundant
Referring to Figure 9, the charging time of the ramp
capacitor is expressed in Equation 8:
and unnecessary in peak current-mode control loops.
Voltage feed-forward operates by modulating the sawtooth
? V RAMP ( PEAK ) ?
t = – R3 ? C7 ? ln ? 1 – ---------------------------------------- ?
? V IN ( MIN ) ?
s
(EQ. 8)
– 2.5 ? 10
R3 = ------------------------------------------------------------------------- = ------------------------------------------------------------
? ln ? 1 – ---------- ?
? V RAMP ( PEAK ) ? 1
4.7 ? 10
ramp in direct proportion to the input voltage. Figure 8
demonstrates the concept.
VIN
ERROR VOLTAGE
RAMP
CT
For optimum performance, the maximum value of the
capacitor should be limited to 10nF. The DC current through
the resistor should be limited to 3mA. For example, if the
oscillator frequency is 400kHz, the minimum input voltage is
300V and a 4.7nF ramp capacitor is selected. The value of
the resistor can be determined by rearranging Equation 8.
– 6
– t
– 9
C7 ? ln ? 1 – ---------------------------------------- ? ? 300 ?
? V IN ( MIN ) ) ?
= 159
k Ω
(EQ. 9)
where t is equal to the oscillator period minus the deadtime.
OUTA, OUTB
FIGURE 8. VOLTAGE FEED FORWARD BEHAVIOR
Input voltage feed-forward may be implemented using the
RAMP input. An RC network connected between the input
voltage and ground, as shown in Figure 9, generates a
voltage ramp proportional to the amplitude of the source
voltage. At the termination of the active output pulse, RAMP
is discharged to ground so that a repetitive sawtooth
waveform is created. The RAMP waveform is compared to
the VERR voltage to determine duty cycle. The selection of
the RC components depends upon the desired input voltage
operating range and the frequency of the oscillator. In typical
applications, the RC components are selected so that the
ramp amplitude reaches 1V at minimum input voltage within
the duration of one half-cycle.
If the deadtime is short relative to the oscillator period, it can
be ignored for this calculation.
When implemented, the voltage feed-forward feature also
provides a volt-second clamp on the transformer. The
maximum duty cycle is determined by the lesser of the
oscillator period or the RAMP charge time. As the input
voltage increases, the RAMP charge time decreases,
limiting the duty cycle proportionately.
If feed-forward operation is not desired, the RC network may
be connected to VREF or a buffered CT signal rather than the
input voltage. Regardless, a sawtooth waveform must be
generated on RAMP as it is required for proper PWM operation.
Implementing Synchronization
Synchronization to an external clock signal may be
accomplished in the same manner as many PWM controllers
that do not have a separate synchronization input. By
injecting a short pulse across a small resistor in series with
R3
VIN
1
2
3
16
15
14
the timing capacitor, the oscillator sawtooth waveform may
be terminated prematurely.
The injected pulse width should be narrower than the
4
5
ISL6742
13
12
sawtooth discharge duration.
6 RAMP
11
1
2
16
15
C7
7
8
10
GND 9
CT
3
4 CT
5
ISL6742
14
13
12
6
7
11
10
RS
8
GND 9
FIGURE 9. VOLTAGE FEED-FORWARD CONTROL
FIGURE 10. SYNCHRONIZATION TO AN EXTERNAL CLOCK
12
FN9183.2
October 31, 2008
相关PDF资料 |
PDF描述 |
|---|---|
| VI-J5D-EY | CONVERTER MOD DC/DC 85V 50W |
| RCM18DTAT | CONN EDGECARD 36POS R/A .156 SLD |
| 0819-92K | COIL RF 680UH MOLDED UNSHIELDED |
| RSM08DTAN | CONN EDGECARD 16POS R/A .156 SLD |
| VI-J5B-EY | CONVERTER MOD DC/DC 95V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL6742AAZA-T | 功能描述:IC REG CTRLR PWM CM/VM 16-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6744AABZ | 功能描述:IC REG CTRLR PWM VM 8-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6744AABZ-T | 功能描述:IC REG CTRLR PWM VM 8-SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6744AAUZ | 功能描述:IC REG CTRLR PWM VM 8-MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL6744AAUZ-T | 功能描述:IC REG CTRLR PWM VM 8-MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
发布紧急采购，3分钟左右您将得到回复。