参数资料
型号: ISL78322ARZ
厂商: Intersil
文件页数: 16/18页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ DL 12-DFN
标准包装: 75
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.6 V ~ 5.5 V
输入电压: 2.8 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 2.25MHz
电流 - 输出: 2A,1.7A
同步整流器:
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 12-VFDFN 裸露焊盘
包装: 管件
供应商设备封装: 12-DFN(4x3)
ISL78322
100% Duty Cycle
The ISL78322 features 100% duty cycle operation to maximize
the battery life. When the battery voltage drops to a level that the
ISL78322 can no longer maintain the regulation at the output,
the regulator completely turns on the P-MOSFET. The maximum
dropout voltage under the 100% duty-cycle operation is the
product of the load current and the ON-resistance of the
P-MOSFET.
Thermal Shutdown
The ISL78322 has built-in thermal protection. When the internal
temperature reaches +150°C, the regulator is completely shut
down. As the temperature drops to +130°C, the ISL78322
resumes operation by stepping through a soft start-up.
Applications Information
Output Inductor and Capacitor Selection
To consider steady state and transient operation, ISL78322
typically uses a 1.2μH output inductor. Higher or lower inductor
values can be used to optimize the total converter system
performance. For example, for higher output voltage 3.3V
applications, in order to decrease the inductor current ripple and
output voltage ripple, the output inductor value can be increased.
The inductor ripple current can be expressed as in Equation 1:
Input Capacitor Selection
The main functions for the input capacitor is to provide
decoupling of the parasitic inductance and to provide a filtering
function, which prevents the switching current from flowing back
to the battery rail. One 10μF X5R or X7R ceramic capacitor is a
good starting point for the input capacitor selection per channel.
An optional input inductor can be used before the ceramic
capacitor to limit switching noise. It is recommended to limit the
inductance less than 0.15μH.
PCB Layout Recommendation
The PCB layout is a very important converter design step to make
sure the designed converter works well. Refer to ISL78322
design procedure for suggestions. For ISL78322, the power loop
is composed of the output inductor L’s, the output capacitor
C OUT1 and C OUT2 , the LX’s pins, and the GND pin. It is necessary
to make the power loop as small as possible and the connecting
traces among them should be direct, short and wide. The
switching node of the converter, the LX_ pins, and the traces
connected to the node are very noisy, so keep the voltage
feedback trace away from these noisy traces. The input capacitor
should be placed as close as possible to the VIN pin and the
ground of input and output capacitors should be connected as
close as possible. The heat of the IC is mainly dissipated through
the thermal pad. Maximizing the copper area connected to the
V O ? ? ?
L ? f S
? V O ?
1 – ---------
? V IN ?
Δ I = ---------------------------------------
(EQ. 1)
thermal pad is preferable. In addition, a solid ground plane is
helpful for better EMI performance. It is recommended to add at
least 5 vias ground connection within the pad for the best
thermal relief.
The inductor’s saturation current rating needs to be at least
larger than the peak current. The ISL78322 protects the typical
peak current 3.2A/2.8A. The saturation current needs to be over
3.6A for maximum output current application.
ISL78322 uses internal compensation network and the output
capacitor value is dependent on the output voltage. The ceramic
capacitor is recommended to be X5R or X7R. The recommended
minimum output capacitor values for the ISL78322 are shown in
Table 1 on page 2.
Output Voltage Selection
The output voltage of the regulator can be programmed via an
external resistor divider that is used to scale the output voltage
relative to the internal reference voltage and feed it back to the
inverting input of the error amplifier. Refer to “Typical
The output voltage programming resistor, R 2 (or R 5 in
Channel 2), will depend on the desired output voltage of the
regulator. The value for the feedback resistor is typically between
0 Ω and 750k Ω .
Let R 3 = 100k Ω , then R 2 will be as shown in Equation 2:
R 2 = R 3 ? ---------------- – 1 ?
? V OUT ?
? V FB ?
(EQ. 2)
If the output voltage desired is 0.6V, then R 3 is left unpopulated
and short R 2 . For better performance, add 10pF in parallel to R 2 .
16
FN7908.1
January 14, 2014
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