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| 型号： | ISL8016IRAJZ-T |
| 厂商： | Intersil |
| 文件页数： | 16/22页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 6A 20QFN |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 6,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 5.5 V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 525kHz ~ 3.9MHz |
| 电流 - 输出： | 6A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-QFN（3x4） |
ISL8016
Frequency Adjust
The frequency of operation is fixed at 1MHz and internal
compensation when FS is tied to VIN. Adjustable frequency
ranges from 500kHz to 4MHz via a simple resistor connecting FS
to SGND according to Equation 1:
PHASE1
CLOCK1
R T [ k Ω ] = ------------------------------ – 14
220 ? 10 3
f OSC [ kHz ]
(EQ. 1)
SYNCIN_S
0.75V
0.8V
Figure 35 is a graph of the measured Frequency vs RT for a VIN of
2.7V and 5.5V.
SYNCOUT_M
w/Cap
20nsDELAY
4200
3500
2800
2100
PHASE2
FIGURE 36. SYNCHRONIZATION WAVEFORMS
Figure 37 is a graph of the Master to Slave phase shift vs SYNCOUT
capacitance for 1MHz switching operation.
300
1400
700
V IN = 2.7V
V IN = 5.5V
250
200
0
0
70
140
210
280
350
420
150
PHASE SHIFT
RTs (k ? )
FIGURE 35. FREQUENCY vs RTs
100
MEASUREMENT
Synchronization Control
The ISL8016 can be synchronized from 500kHz to 4MHz by an
external signal applied to the SYNCIN pin. SYNCIN frequency should
50
0
0
40
PHASE SHIFT
CALCULATION
80 120
160
200
240
be greater than 50% of internal clock frequency. The rising edge on
the SYNCIN triggers the rising edge of the PHASE pulse. Make sure
that the minimum on time of the PHASE node is greater than
140ns.
SYNCOUT is a 250μA current pulse signal output trigger on by
rising edge of the clock or SYNCIN signal (whichever is greater in
frequency) to dive other ISL8016 and avoid system’s beat
frequencies effect. See Figure 36 for more detail. The current
pulse is terminated and SYNCOUT is discharged to 0V after 0.8V
threshold is reached. SYNCOUT is 0V if the regulator operates at
light PFM load.
To implement time shifting between the master circuit to the
slave, it is recommended to add a capacitor, C13 as shown in
Figure 3. The time delay from SYNCOUT_Master to SYNCIN_Slave
as shown in Figure 3 is calculated in pF using Equation 2:
C13 (pF)
FIGURE 37. PHASE SHIFT vs CAPACITANCE
Overcurrent Protection
The overcurrent protection is realized by monitoring the CSA
output with the OCP comparator, as shown in Figure 4. The current
sensing circuit has a gain of 138mV/A, from the P-FET current to
the CSA output. When the CSA output reaches a threshold set by
ISET, the OCP comparator is tripped to turn off the P-FET
immediately. See “Analog Specifications” on page 7 of the OCP
threshold for various ISET configurations. The overcurrent function
protects the switching converter from a shorted output by
monitoring the current flowing through the upper MOSFET.
Upon detection of overcurrent condition, the upper MOSFET will
be immediately turned off and will not be turned on again until
C 13 ( pF ) = 0.333 ? ( t – 20 ) ( ns )
(EQ. 2)
the next switching cycle. Upon detection of the initial overcurrent
condition, the overcurrent fault counter is set to 1. If, on the
Where t is the desired time shift between the master and the
slave circuits in ns. Care must be taken to include PCB parasitic
capacitance of ~3pF to 10pF.
The maximum should be limited to 1/Fs-100ns to insure that
SYNCOUT has enough time to discharge before the next cycle
starts.
16
subsequent cycle, another overcurrent condition is detected, the
OC fault counter will be incremented. If there are 17 sequential
OC fault detections, the regulator will be shut down under an
overcurrent fault condition. An overcurrent fault condition will
result in the regulator attempting to restart in a hiccup mode
within the delay of eight soft-start periods. At the end of the eight
soft-start wait period, the fault counters are reset and soft-start is
attempted again. If the overcurrent condition goes away during
the delay of eight soft-start periods, the output will resume back
into regulation point after hiccup mode expires.
FN7616.1
May 5, 2011
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