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参数资料
| 型号： | ISL8118EVAL1Z |
| 厂商： | Intersil |
| 文件页数： | 16/20页 |
| 文件大小： | 0K |
| 描述： | EVALUATION BOARD FOR ISL8118 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 1.8V |
| 电流 - 输出： | 25A |
| 输入电压： | 4.5 ~ 20 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 300kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ISL8118 |
ISL8118
Figure 8 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
C 2
current paths on the SS pin and locate the capacitor, CSS
close to the SS pin (as described earlier) as the internal
current source is only 38μA. Provide local decoupling
between PVCC and PGND pins as described earlier. Locate
the capacitor, CBOOT as close as practical to the BOOT and
COMP
R 2
E/A
-
+
C 1
FB
R 3
R 1
C 3
LX pins.
VREF
Compensating the Converter
The ISL8118 single-phase converter is a voltage-mode
controller. This section highlights the design considerations for
a voltage-mode controller requiring external compensation. To
-
+
VDIFF
VSENSN
C SEN
R FB
R OS
address a broad range of applications, a type-3 feedback
network is recommended (see Figure 9).
VSENSP
C 2
OSCILLATOR
V IN
V OUT
R 2
C 1
COMP
PWM
CIRCUIT
V OSC
C 3
FB
HALF-BRIDGE
TGATE
L
DCR
R 3
R 1
VDIFF
ISL8118
DRIVE
LX
C
FIGURE 9. COMPENSATION CONFIGURATION FOR ISL8118
BGATE
ESR
WHEN USING DIFFERENTIAL REMOTE SENSE
ISL8118
EXTERNAL CIRCUIT
Figure 10 highlights the voltage-mode control loop for a
synchronous-rectified buck converter, when using an internal
differential remote sense amplifier. The output voltage (V OUT )
is regulated to the reference voltage, VREF, level. The error
amplifier output (COMP pin voltage) is compared with the
oscillator (OSC) triangle wave to provide a pulse-width
modulated wave with an amplitude of V IN at the LX node. The
PWM wave is smoothed by the output filter (L and C). The
output filter capacitor bank’s equivalent series resistance is
represented by the series resistor ESR.
The modulator transfer function is the small-signal transfer
function of V OUT /V COMP . This function is dominated by a DC
gain, given by d MAX V IN /V OSC , and shaped by the output
filter, with a double pole break frequency at F LC and a zero at
F CE . For the purpose of this analysis C and ESR represent
the total output capacitance and its equivalent series
resistance.
FIGURE 10. VOLTAGE-MODE BUCK CONVERTER
COMPENSATION DESIGN
The compensation network consists of the error amplifier
(internal to the ISL8118) and the external R 1 -R 3 , C 1 -C 3
components. The goal of the compensation network is to
provide a closed loop transfer function with high 0dB crossing
frequency (F 0 ; typically 0.1 to 0.3 of F SW ) and adequate
phase margin (better than 45°). Phase margin is the
difference between the closed loop phase at F 0dB and 180°.
The equations that follow relate the compensation network’s
poles, zeros and gain to the components (R 1 , R 2 , R 3 , C 1 , C 2 ,
and C 3 ) in Figures 9 and 10. Use the following guidelines for
locating the poles and zeros of the compensation network:
1. Select a value for R 1 (1k Ω to 10k Ω , typically). Calculate
value for R 2 for desired converter bandwidth (F 0 ). If
setting the output voltage to be equal to the reference set
voltage as shown in Figure 9, the design procedure can
F LC = ---------------------------
F CE = ---------------------------------
1
2 π ? L ? C
1
2 π ? C ? ESR
(EQ. 7)
(EQ. 8)
be followed as presented. However, when setting the
output voltage via a resistor divider placed at the input of
the differential amplifier (as shown in Figure 10), in order
to compensate for the attenuation introduced by the
resistor divider, the below obtained R 2 value needs be
multiplied by a factor of (R OS + R FB )/R OS . The
remainder of the calculations remain unchanged, as long
as the compensated R 2 value is used.
d MAX ? V IN ? F LC
16
V OSC ? R 1 ? F 0
R 2 = ---------------------------------------------
(EQ. 9)
FN6325.2
November 29, 2012
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| ISL8118IRZ | 功能描述:IC REG CTRLR BUCK PWM VM 28-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:75 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.3 V ~ 13.5 V 降压:是 升压:是 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:0°C ~ 70°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:管件 产品目录页面:1051 (CN2011-ZH PDF) 其它名称:296-2543-5 |
| ISL8118IRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 28-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL8120 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Dual/n-Phase Buck PWM Controller with Integrated Drivers |
| ISL8120CRZ | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
| ISL8120CRZ-T | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:275kHz 占空比:50% 电源电压:18 V ~ 110 V 降压:无 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) |
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