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参数资料
| 型号： | ISL8200MEVAL2PHZ |
| 厂商： | Intersil |
| 文件页数： | 9/23页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR ISL8200M |
| 产品培训模块： | Solutions for Industrial Control Applications |
| 标准包装： | 1 |
| 系列： | * |
ISL8200M
Electrical Specifications
Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified.
Temperature limits established by characterization and are not production tested. Boldface
limits apply over the operating temperature range, -40°C to +85°C. (Continued)
TYP
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 6)
MAX
UNITS
Input Common Mode Range
-0.2
V CC - 1.8
V
Disable Threshold
V VSEN-
V MON1 = Tri-State
V CC - 0.4
V
OVERCURRENT PROTECTION (Note 7)
Channel Overcurrent Limit
I SOURCE
V CC = 2.97V to 5.6V
108
μA
Channel Overcurrent Limit
Share Pin OC Threshold
I SOURCE
V OC_SET
V CC = 5V;
V CC = 2.97V to 5.6V
(comparator offset included)
89
1.16
108
1.20
122
1.22
μA
V
Share Pin OC Hysteresis
V OC_SET_HYS V CC = 2.97V to 5.6V
(comparator offset included)
50
mV
CURRENT SHARE
External Current Share
Accuracy
V CC = 2.97V and 5.6V, 1% Resistor
Sense, 10mV Signal
±5
%
POWER GOOD MONITOR (Note 7)
Undervoltage Falling Trip Point
Undervoltage Rising Hysteresis
Overvoltage Rising Trip Point
Overvoltage Falling Hysteresis
V UVF
V UVR_HYS
V OVR
V OVF_HYS
Percentage Below Reference Point
Percentage Above UV Trip Point
Percentage Above Reference Point
Percentage below OV Trip Point
-15
11
-13
4
13
4
-11
15
%
%
%
%
PGOOD Low Output Voltage
Sinking Impedance
Maximum Sinking Current
Maximum Open Drain Voltage
I PGOOD = 2mA
I PGOOD = 2mA
V PGOOD <0.8V
V CC
10
0.35
70
V
Ω
mA
V
OVERVOLTAGE PROTECTION (Note 7)
OV Latching Up Trip Point
EN/FF= UGATE = LATCH Low,
118
120
122
%
LGATE = High
OV Non-Latching Up Trip Point
LGATE Release Trip Point
EN = Low, UGATE = Low, LGATE = High
EN = Low/HIGH, UGATE = Low,
113
87
%
%
LGATE = Low
OVER-TEMPERATURE PROTECTION
Over-Temperature Trip
Over-Temperature Release
Threshold
INTERNAL COMPONENT VALUES
150
125
° C
° C
Internal Resistor Between
PVCC and VCC pin
Internal Resistor Between
PHASE and OCSET Pins
Internal Resistor Between
FSYNC_IN and SGND Pins
Internal Resistor Between
PGOOD and VCC Pins
Internal Resistor Between
CLKOUT and VCC Pins
Internal Resistor Between
PH_CNTRL and VCC Pins
Internal Resistor Between
VOUT_SET and VSEN_REM- pin
9
R CC
R SEN1
R FS
R PG
R CLK
R PHC
R OS1
5
2.2k
59k
10k
10k
10k
2.2k
Ω
Ω
Ω
Ω
Ω
Ω
Ω
FN6727.1
February 26, 2010
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