参数资料
型号: ISL8510EVAL1Z
厂商: Intersil
文件页数: 17/21页
文件大小: 0K
描述: EVALUATION BOARD FOR ISL8510
标准包装: 1
主要目的: DC/DC,LDO 步降
输出及类型: 3,非隔离
输出电压: 3.3V,1.2V,1.8V
电流 - 输出: 1A,500mA,500mA
输入电压: 4.5 ~ 25 V
稳压器拓扑结构: 降压
频率 - 开关: 500kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: ISL8510
ISL8510
with an ESR of 50m Ω or less to insure stability and optimum
transient response. For stable operation, a ceramic
of the ripple current. The ripple voltage and current are
approximated using Equation 3:
capacitor, with a minimum value of 10μF, is recommended
for LDO output. There is no upper limit to the output
capacitor value. Larger capacitor values can reduce noise
Δ I =
V IN - V OUT
Fs x L
x
V OUT
V IN
Δ V OUT = Δ I x ESR
(EQ. 3)
t RISE =
V IN - V OUT
and improve load transient response, stability and PSRR.
The output capacitor should be located very close to the
VOUT pins to minimize impact of PC board inductances. The
other end of the capacitor should be returned to a clean
analog ground.
Buck Regulator Output Capacitor Selection
An output capacitor is required to filter the inductor current
and supply the load transient current. The filtering
requirements are a function of the switching frequency and
the ripple current. The load transient requirements are a
function of the slew rate (di/dt) and the magnitude of the
transient load current. These requirements are generally met
with a mix of capacitors and careful layout.
Embedded processor systems are capable of producing
transient load rates above 1A/ns. High frequency capacitors
initially supply the transient and slow the current load rate
seen by the bulk capacitors. The bulk filter capacitor values
are generally determined by the ESR (Effective Series
Resistance) and voltage rating requirements rather than
actual capacitance requirements.
High frequency decoupling capacitors should be placed as
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values reduce
the converter ’s response time to a load transient. The
recommended Δ I is 30% of the maximum output current.
One of the parameters limiting the converter ’s response to
a load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
ISL8510 will provide either 0% or 100% duty cycle in
response to a load transient. The response time is the time
required to slew the inductor current from an initial current
value to the transient current level. During this interval, the
difference between the inductor current and the transient
current level must be supplied by the output capacitor.
Minimizing the response time can minimize the output
capacitance required.
The response time to a transient is different for the
application of load and the removal of load. Equations 4
and 5 give the approximate response time interval for
application and removal of a transient load:
L x I TRAN
(EQ. 4)
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
t FALL =
L x I TRAN
V OUT
(EQ. 5)
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
bulk capacitor’s ESR will determine the output ripple voltage
and the initial voltage drop after a high slew-rate transient. An
aluminum electrolytic capacitor’s ESR value is related to the
case size with lower ESR available in larger case sizes.
However, the Equivalent Series Inductance (ESL) of these
capacitors increases with case size and can reduce the
usefulness of the capacitor to high slew-rate transient loading.
Unfortunately, ESL is not a specified parameter. Work with
your capacitor supplier and measure the capacitor’s
impedance with frequency to select a suitable component. In
most cases, multiple electrolytic capacitors of small case size
perform better than a single large case capacitor.
where: I TRAN is the transient load current step, t RISE is the
response time to the application of load, and t FALL is the
response time to the removal of load. The worst case
response time can be either at the application or removal of
load. Be sure to check both of these equations at the
minimum and maximum output levels for the worst case
response time.
Rectifier Selection
Current circulates from ground to the junction of the MOSFET
and the inductor when the high-side switch is off. As a
consequence, the polarity of the switching node is negative
with respect to ground. This voltage is approximately -0.5V (a
Schottky diode drop) during the off-time. The rectifier's rated
reverse breakdown voltage must be at least equal to the
maximum input voltage, preferably with a 20% derating factor.
The power dissipation is as shown in Equation 6:
P D [ W ] = I OUT ? V D ? ? 1 – ---------------- ?
Output Inductor Selection
The output inductor is selected to meet the output voltage
? V OUT ?
? V IN ?
(EQ. 6)
ripple requirements and minimize the converter ’s response
time to the load transient. The inductor value determines the
converter ’s ripple current and the ripple voltage is a function
17
where V D is the voltage of the Schottky diode = 0.5V to 0.7V
Input Capacitor Selection
Use a mix of input bypass capacitors to control the voltage
overshoot across the MOSFETs. Use small ceramic
capacitors for high frequency decoupling and bulk capacitors
FN6516.2
December 15, 2008
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