参数资料
| 型号： | ISL8560IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 13/17页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 2A 20QFN |
| 标准包装： | 4,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.21 V ~ 55 V |
| 输入电压： | 9 V ~ 60 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 100kHz ~ 600kHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-QFN（6x6） |
ISL8560
The amplitudes of the different types of voltage excursions
can be approximated by using the formulas in Equation 4:
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values reduce
Δ V ESL = ESL ? ---------------
Δ V ESR = ESR ? I tran
dI tran
dt
the converter ’s response time to a load transient. Use Δ I of
approximately 30% of I OUT is a good compromise.
L out ? I tran
C out ? ( V in – V out )
2
Δ V SAG = --------------------------------------------------
One of the parameters limiting the converter ’s response to
a load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
L out ? I tran
C out ? V out
2
Δ V HUMP = --------------------------------
(EQ. 4)
ISL8560 will provide either 0% or 100% duty cycle in
response to a load transient. The response time is the time
required to slew the inductor current from an initial current
--------------------------------- + ESR ? I tran
Number of Caps = -----------------------------------------------------------------------
L x I TRAN L x I TRAN (EQ. 8)
where
I tran = Output Load Current Transient
C out = Total Output Capacitance
In a typical converter design, the ESR of the output capacitor
bank dominates the transient response. The ESR and the
ESL are typically the major contributing factors in
determining the output capacitance. The number of output
capacitors can be determined by using Equation 5, which
relates the ESR and ESL of the capacitors to the transient
load step and the voltage limit ( Δ Vo):
ESL ? dI tran
dt (EQ. 5)
Δ V o
If Δ V SAG and/or Δ V HUMP are found to be too large for the
output voltage limits, then the amount of capacitance may
need to be increased. In this situation, a trade off between
output inductance and output capacitance may be
necessary.
The ESL of the capacitors, which is an important parameter
in Equations 4 and 5, is not usually listed in databooks.
Practically, it can be approximated if an impedance vs
frequency curve is given for a specific capacitor (C):
value to the transient current level. During this interval the
difference between the inductor current and the transient
current level must be supplied by the output capacitor.
Minimizing the response time can minimize the output
capacitance required.
The response time to a transient is different for the
application of load and the removal of load. Equation 8 gives
the approximate response time interval for application and
removal of a transient load:
t RISE = t FALL =
V IN - V OUT V OUT
where: I TRAN is the transient load current step, t RISE is the
response time to the application of load, and t FALL is the
response time to the removal of load. The worst case
response time can be either at the application or removal of
load. Be sure to check both of these equations at the
minimum and maximum output levels for the worst case
response time.
Rectifier Selection
Current circulates from ground to the junction of the
MOSFET and the inductor when the high-side switch is off.
As a consequence, the polarity of the switching node is
ESL = ----------------------------------------
C ( 2 ? π ? f res )
1
2
(EQ. 6)
negative with respect to ground. This voltage is
approximately -0.5V (a Schottky diode drop) during the off
where f res is the frequency where the lowest impedance
is achieved (resonant frequency).
time. The rectifier's rated reverse breakdown voltage must
be at least equal to the maximum input voltage, preferably
with a 20% derating factor. The power dissipation is:
P D [ W ] = I OUT ? V D ? ? 1 – ---------------- ?
The ESL of the capacitors becomes a concern when
designing circuits that supply power to loads with high rates
of change in the current.
? V OUT ?
? V IN ?
(EQ. 9)
Output Inductor Selection
The output inductor is selected to meet the output voltage
ripple requirements and minimize the converter ’s response
time to the load transient. The inductor value determines the
converter ’s ripple current and the ripple voltage is a function
of the ripple current. The ripple voltage and current are
approximated by Equation 7:
where V D is the voltage of the Schottky diode = 0.5V to 0.7V
Input Capacitor Selection
Use a mix of input bypass capacitors to control the voltage
overshoot across the VIN’s pin. Use small ceramic
capacitors for high frequency decoupling and bulk capacitors
to supply the current needed each time the upper MOSFET
turns on. Place the small ceramic capacitors physically close
Δ I =
V IN - V OUT
Fs x L
x
V OUT
V IN
Δ V OUT = Δ I x ESR
(EQ. 7)
to the VIN and PGND pins.
The important parameters for the bulk input capacitance are
the voltage rating and the RMS current rating. For reliable
13
FN9244.7
September 19, 2008
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相关代理商/技术参数 |
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| ISL8560MREP | 制造商:Intersil Corporation 功能描述:V62/08608-01XB, -55 TO 125C VID VERSION OF THE ISL8560, 20LD - Rail/Tube |
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