参数资料
| 型号： | ISL9107IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 11/12页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 1.5A 8DFN |
| 标准包装： | 6,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 5.5 V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.6MHz |
| 电流 - 输出： | 1.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-VFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 8-DFN（2x3） |
ISL9107, ISL9108
The rising edge of the PG output is delayed by 215ms
(typical) from the time the power-good signal is issued. This
function is provided on ISL9107 only.
Applications Information
Inductor and Output Capacitor Selection
To achieve better steady state and transient response,
typically a 2.2μH inductor can be used. The peak-to-peak
inductor current ripple can be expressed as in Equation 1:
calculated as V O /(R 2 + R 3 ), so larger resistance is desirable
to minimize this current. On the other hand, the FB pin has
leakage current that will cause error in the output voltage
setting. The leakage current has a typical value of 0.1μA. To
minimize the accuracy impact on the output voltage, select
the R 3 no larger than 200k Ω .
C 3 (shown in Figure 16) is highly recommended to be added
for improving stability and achieving better transient
response. C 3 can be calculated using Equation 3:
V O ? ? 1 – --------- ?
L ? f S
C 3 = -----------------------------------------------------
? V O ?
? V IN ?
Δ I = ---------------------------------------
(EQ. 1)
1
2 × π × R 2 × 7.3kHz (EQ. 3)
Table 1 provides the recommended component values for
In Equation 1, usually the typical values can be used but to
have a more conservative estimation, the inductance should
consider the value with worst case tolerance; and for
switching frequency (f S ), the minimum f S from the “Electrical
Specifications” table on page 2 can be used.
To select the inductor, its saturation current rating should be
at least higher than the sum of the maximum output current
and half of the delta calculated from Equation 1. Another
more conservative approach is to select the inductor with the
current rating higher than the P-Channel MOSFET peak
current limit.
Another consideration is the inductor DC resistance since it
directly affects the efficiency of the converter. Ideally, the
inductor with the lower DC resistance should be considered
to achieve higher efficiency.
Inductor specifications could be different from different
manufacturers so please check with each manufacturer if
additional information is needed.
For the output capacitor, a ceramic capacitor can be used
because of the low ESR values, which helps to minimize the
output voltage ripple. A typical value of 10μF/6.3V ceramic
capacitor should be enough for most of the applications and
the capacitor should be X5R or X7R.
Input Capacitor Selection
some output voltage options.
Layout Recommendation
The PCB layout is a very important converter design step to
make sure the designed converter works well, especially
under the high current, high switching frequency condition.
For ISL9107 and ISL9108, the power loop is composed of
the output inductor (L), the output capacitor (C OUT ), the SW
pin and the GND pin. It is necessary to make the power loop
as small as possible and the connecting traces among them
should be direct, short and wide; the same type of traces
should be used to connect the VIN pin, the input capacitor
C IN and its ground. The switching node of the converter, the
SW pin, and the traces connected to this node are very
noisy, so keep the voltage feedback trace and other noise
sensitive traces away from these noisy traces.
The input capacitor should be placed as close as possible to
the VIN pin. The ground of the input and output capacitors
should be connected as close as possible as well.
The heat of the IC is mainly dissipated through the thermal
pad. Maximizing the copper area connected to the thermal
pad is preferable. In addition, a solid ground plane is helpful
for EMI performance.
TABLE 1. ISL9107 AND ISL9108 RECOMMENDED CIRCUIT
CONFIGURATION vs V OUT
The main function for the input capacitor is to provide
decoupling of the parasitic inductance and to provide filtering
function to prevent the switching current from flowing back to
V OUT (V)
0.8
1.0
L (μH)
2.2
2.2
C 2 (μF)
10
10
R 2 (k Ω )
0
44.2
C 3 (pF)
N/A
470
R 3 (k Ω)
100
178
the battery rail. A 10μF/6.3V ceramic capacitor (X5R or X7R)
is a good starting point for the input capacitor selection.
Output Voltage Setting Resistor Selection
The voltage divider resistors (R 2 and R 3 ), as shown in
Figure 16, set the desired output voltage value. The output
voltage can be calculated using Equation 2:
1.2
1.5
1.8
2.5
2.8
2.2
2.2
2.2
2.2~3.3
2.2~3.3
10
10
10
10~22
10~22
80.6
84.5
100
100
100
270
270
220
220
220
162
97.6
80.6
47.5
40.2
V O = V FB ? ? 1 + ------- ?
? R 2 ?
? R 3 ?
(EQ. 2)
3.3
2.2~3.3
10~22
102
220
32.4
where V FB is the feedback voltage (typically it is 0.8V). The
current flowing through the voltage divider resistors can be
11
FN6612.0
December 21, 2007
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相关代理商/技术参数 |
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| ISL9108 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:1.5A 1.6MHz Low Quiescent Current High Efficiency Synchronous Buck Regulator |
| ISL9108EVAL1Z | 功能描述:电源管理IC开发工具 ISL9108 EVALUATION BOARD 1 - RoHS COMPLIANT - DFN RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| ISL9108IRZ-T | 功能描述:IC REG BUCK SYNC ADJ 1.5A 8DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:两者兼有 输出数:1 输出电压:5V，1 V ~ 10 V 输入电压:3.5 V ~ 28 V PWM 型:电流模式 频率 - 开关:220kHz ~ 1MHz 电流 - 输出:600mA 同步整流器:无 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SSOP（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:16-QSOP |
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