参数资料
型号: ISL9443IRZ-T7A
厂商: Intersil
文件页数: 2/23页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 32-QFN
标准包装: 1
PWM 型: 电流模式
输出数: 3
频率 - 最大: 1.32MHz
电源电压: 4.5 V ~ 26 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 32-VFQFN 裸露焊盘
包装: 标准包装
其它名称: ISL9443IRZ-T7ADKR
ISL9443
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL9443IRZ
PART
MARKING
ISL9443 IRZ
TEMP. RANGE
(°C)
-40 to +85
PACKAGE
(Pb-Free)
32 Ld 5x5 QFN
PKG.
DWG. #
L32.5X5B
NOTES:
1. Add “-T*” for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9443 . For more information on MSL please see techbrief TB363 .
Pin Configuration
ISL9443
(32 LD 5x5 QFN)
TOP VIEW
32
31
30
29
28
27
26
25
ISEN1
VCC_5V
VIN
EN/SS1
FB1
OCSET1
RT
PGOOD
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
ISEN2
PGND
LGATE3
UGATE3
BOOT3
PHASE3
ISEN3
MODE/SYNC
9
10
11
12
13
14
15
16
Pin Descriptions
PIN
1
2
3
4
NAME
ISEN1
VCC_5V
VIN
EN/SS1
FUNCTION
Current signal input for PWM1. This pin is used to monitor the voltage drop across the lower MOSFET for current loop
feedback and overcurrent protection.
Output of the internal 5V linear regulator. This output supplies bias for the IC, the low side gate drivers, and the external
boot circuitry for the high-side gate drivers. The VCC_5V pin must be always decoupled to power ground with a minimum
of 4.7μF ceramic capacitor, placed very close to the pin. Do not allow the voltage at VCC_5V to exceed VIN at any time.
This pin should be tied to the input rail. It provides power to the internal linear drive circuitry and is also used by the feed-
forward controller to adjust the amplitude of each PWM sawtooth. Decouple this pin with a small ceramic capacitor
(0.1μF to 1μF) to ground.
This pin provides an enable/disable function and soft-starting for PWM1 output. The output is disabled when the pin is
pulled to GND. During start-up, a regulated 1.55μA soft-start current charges an external capacitor connected at this pin.
When the voltage on the EN/SS1 pin reaches 1.3V, the PWM1 output becomes active. From 1.3V to 2.0V, the reference
voltage of the PWM1 is clamped to the voltage at EN/SS1 minus 1.3V. The capacitance of the soft-start capacitors sets
the soft-starting time and enable delay time. Setting the soft-starting time too short might create undesirable overshoot
at the output during start-up. VCC_5V UVLO discharges the EN/SS1 via an internal MOSFET.
2
FN7663.1
February 24, 2012
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