参数资料
型号: ISL95870BHRZ-T
厂商: Intersil
文件页数: 23/28页
文件大小: 0K
描述: IC CTRLR PWM 1PHASE GPU 20QFN
标准包装: 6,000
应用: 控制器,GPU 内核电源
输入电压: 3.3 V ~ 25 V
输出数: 1
输出电压: 0.5 V ~ 5 V
工作温度: -10°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 20-VFQFN 裸露焊盘
供应商设备封装: 20-QFN(3x4)
包装: 带卷 (TR)
ISL95870, ISL95870A, ISL95870B
In addition to the bulk capacitors, some low ESL ceramic
Where:
capacitors are recommended to decouple between the drain of
the high-side MOSFET and the source of the low-side MOSFET.
0.6
-
-
-
F sw is the switching frequency of the PWM signal
V U is the upper gate driver bias supply voltage
V L is the lower gate driver bias supply voltage
0.5
x=0
-
Q U is the charge to be delivered by the upper driver into the
gate of the MOSFET and discrete capacitors
0.4
0.3
0.2
x=1
x = 0.5
- Q L is the charge to be delivered by the lower driver into the
gate of the MOSFET and discrete capacitors
- P L is the quiescent power consumption of the lower driver
- P U is the quiescent power consumption of the upper driver
0.1
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1000
900
800
Q U =100nC
Q L =200nC
Q U =50nC
Q L =100nC
Q U =50nC
Q L =50nC
DUTY CYCLE
700
FIGURE 19. NORMALIZED INPUT RMS CURRENT FOR EFF = 1
Selecting the Bootstrap Capacitor
The integrated driver features an internal bootstrap schottky
diode. Simply adding an external capacitor across the BOOT and
PHASE pins completes the bootstrap circuit. The bootstrap
capacitor voltage rating is selected to be at least 10V. Although the
600
500
400
300
200
100
Q U =20nC
Q L =50nC
theoretical maximum voltage of the capacitor is PVCC-V DIODE
(voltage drop across the boot diode), large excursions below
0
0
200
400
600
800
1k
1.2k 1.4k 1.6k 1.8k 2k
ground by the phase node requires at least a 10V rating for the
bootstrap capacitor. The bootstrap capacitor can be chosen from
FREQUENCY (Hz)
FIGURE 20. POWER DISSIPATION vs FREQUENCY
C BOOT ≥ ------------------------
Equation 43:
Q GATE
Δ V BOOT
(EQ. 43)
MOSFET Selection and Considerations
The choice of MOSFETs depends on the current each MOSFET will
be required to conduct, the switching frequency, the capability of
Where:
- Q GATE is the amount of gate charge required to fully charge
the gate of the upper MOSFET
- Δ V BOOT is the maximum decay across the BOOT capacitor
As an example, suppose the high-side MOSFET has a total gate
charge Q g , of 25nC at V GS = 5V, and a Δ V BOOT of 200mV. The
calculated bootstrap capacitance is 0.125μF; for a comfortable
margin, select a capacitor that is double the calculated
capacitance. In this example, 0.22μF will suffice. Use a low
temperature-coefficient ceramic capacitor.
Driver Power Dissipation
Switching power dissipation in the driver is mainly a function of
the switching frequency and total gate charge of the selected
MOSFETs. Calculating the power dissipation in the driver for a
desired application is critical to ensuring safe operation.
the MOSFETs to dissipate heat, and the availability and nature of
heat sinking and air flow.
Typically, a MOSFET cannot tolerate even brief excursions beyond
their maximum drain to source voltage rating. The MOSFETs used
in the power stage of the converter should have a maximum V DS
rating that exceeds the sum of the upper voltage tolerance of the
input power source and the voltage spike that occurs when the
MOSFETs switch.
There are several power MOSFETs readily available that are
optimized for DC/DC converter applications. The preferred high-
side MOSFET emphasizes low gate charge so that the device
spends the least amount of time dissipating power in the linear
region. The preferred low-side MOSFET emphasizes low r DS(on)
when fully saturated to minimize conduction loss.
For the low-side MOSFET, (LS), the power loss can be assumed to
be conductive only and is written as Equation 45:
P CON_LS ≈ I LOAD ? r DS ( ON ) _LS ? ( 1 – D )
Exceeding the maximum allowable power dissipation level will
push the IC beyond the maximum recommended operating
junction temperature of +125°C. When designing the
2
(EQ. 45)
(EQ. 46)
P CON_HS = I LOAD ? r DS ( ON ) _HS ? D
application, it is recommended that the following calculation be
performed to ensure safe operation at the desired frequency for
the selected MOSFETs. The power dissipated by the drivers is
approximated as Equation 44:
For the high-side MOSFET, (HS), its conduction loss is written as
Equation 46:
2
P = F sw ( 1.5V U Q U + V L Q L ) + P L + P U
23
(EQ. 44)
FN6899.1
December 2, 2013
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