参数资料
| 型号： | ISL97649AIRZ |
| 厂商： | Intersil |
| 文件页数： | 8/21页 |
| 文件大小： | 0K |
| 描述： | IC POWER MANAGEMENT |
| 标准包装： | 75 |
| 系列： | * |
ISL97649A
Serial Interface Specifications
For SCL and SDA Unless Otherwise Noted. (Continued)
MIN
TYP
MAX
SYMBOL
t SU:DAT
PARAMETER
Input Data Set-up Time
TEST CONDITIONS
From SDA exiting the 30% to 70% of V IN
window, to SCL rising edge crossing 30% of
(Note 14)
40
(Note 7)
(Note 14)
UNITS
ns
V IN
t HD:DAT
t SU:STO
t HD:STO
C SCL
C SDA
t Wp
Input Data Hold Time
STOP Condition Set-up Time
STOP Condition Hold Time for Read, or
Volatile Only Write
Capacitive on SCL
Capacitive on SDA
Non-Volatile Write Cycle Time
EEPROM Endurance
EEPROM Retention
From SCL rising edge crossing 70% of V IN to
SDA entering the 30% to 70% of V IN window
From SCL rising edge crossing 70% of V IN , to
SDA rising edge crossing 30% of V IN
From SDA rising edge to SCL falling edge;
both crossing 70% of V IN
T A = +25°C
T A = +25°C
0
400
400
5
5
25
1
88
ns
ns
ns
pF
pF
ms
kCyc
kHrs
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
7. Typical values are for T A = +25°C and V IN = 3.3V.
8. LSB = I V 255 - V 1 I / 254. V 255 and V 1 are the measured voltages for the DCP register set to FF hex and 01 hex respectively.
9. DNL = I V i+1 - V i I / LSB-1, i ∈ [ 1 , 255 ]
10. ZS error = (V 1 -VMIN) / LSB. VMIN = (VAVDD*R2) * [1-254*R1/(255*20*RSET)]/ (R1+R2).
11. FS error = (V 255 - VMAX) / LSB. VMAX= (VAVDD*R2) * [1-0*R1/(255*20*RSET)]/ (R1+R2).
12. Established by design. Not a parametric spec.
13. Boost will stop switching as soon as boost output reaches OVP threshold.
14. Compliance to limits is assured by characterization and design.
8
FN7928.3
June 27, 2013
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