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参数资料
型号： ISP1563BM,557
厂商： ST-ERICSSON
元件分类： 总线控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP100
封装： 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-100
文件页数： 45/102页
文件大小： 466K
代理商： ISP1563BM,557
ISP1563_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 15 March 2007
47 of 102
NXP Semiconductors
ISP1563
HS USB PCI Host Controller
11.1.10 HcControlCurrentED register
The HcControlCurrentED register contains the physical address of the current ED of the
control list. The bit allocation is given in Table 61.
11.1.11 HcBulkHeadED register
This is a 4-byte register, and the bit allocation is given in Table 63. The register contains
the physical address of the rst ED of the bulk list.
Table 60.
HcControlHeadED - Host Controller Control Head Endpoint Descriptor register bit description
Address: Content of the base address register + 20h
Bit
Symbol
Description
31 to 4 CHED[27:0] Control Head ED: The Host Controller traverses the control list, starting with the HcControlHeadED
pointer. The content is loaded from HCCA during the initialization of the Host Controller.
3 to 0
reserved
-
Table 61.
HcControlCurrentED - Host Controller Control Current Endpoint Descriptor register bit allocation
Address: Content of the base address register + 24h
Bit
31
30
29
28
27
26
25
24
Symbol
CCED[27:20]
Reset
00000000
Access
RRRRRRRR
Bit
23
22
21
20
19
18
17
16
Symbol
CCED[19:12]
Reset
00000000
Access
RRRRRRRR
Bit
15
14
13
12
11
10
9
8
Symbol
CCED[11:4]
Reset
00000000
Access
RRRRRRRR
Bit
7
6
5
4
3
2
1
0
Symbol
CCED[3:0]
reserved
Reset
00000000
Access
RRRRRRRR
Table 62.
HcControlCurrentED - Host Controller Control Current Endpoint Descriptor register bit description
Address: Content of the base address register + 24h
Bit
Symbol
Description
31 to 4
CCED[27:0] Control Current ED: This pointer is advanced to the next ED after serving the current ED. The Host
Controller needs to continue processing the list from where it was left in the last frame. When it
reaches the end of the control list, the Host Controller checks CLF (bit 1 of HcCommandStatus). If
set, it copies the content of HcControlHeadED to HcControlCurrentED and clears the bit. If not set,
it does nothing. The HCD is allowed to modify this register only when CLE (bit 4 of HcControl) is
cleared. When set, the HCD only reads the instantaneous value of this register. Initially, this is set to
logic 0 to indicate the end of the control list.
3 to 0
reserved
-
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