参数资料
型号: ISPLSI 1048C-70LQ
厂商: Lattice Semiconductor Corporation
文件页数: 2/15页
文件大小: 0K
描述: IC PLD ISP 96I/O 16NS 128PQFP
标准包装: 24
系列: ispLSI® 1000
可编程类型: 系统内可编程
最大延迟时间 tpd(1): 18.0ns
电压电源 - 内部: 4.75 V ~ 5.25 V
逻辑元件/逻辑块数目: 48
门数: 8000
输入/输出数: 96
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 128-BQFP
供应商设备封装: 128-PQFP(28x28)
包装: 托盘
其它名称: ISPLSI1048C-70LQ
Specifications ispLSI 1048C
9
Maximum GRP Delay vs GLB Loads
ispLSI 1048C-70
4
5
6
4
8
12
16
GLB Loads
GRP
Delay
(ns)
ispLSI 1048C-50
7
8
9
10
3
0126A-48C-80-isp
1
11
Power Consumption
Power consumption in the ispLSI 1048C device depends
on two primary factors: the speed at which the device is
operating, and the number of Product Terms used. Fig-
Figure 3. Typical Device Power Consumption vs fmax
ure 3 shows the relationship between power and operat-
ing speed.
50
100
150
200
250
0
10
20
30
40
506070
fmax (MHz)
I CC
(mA)
Notes: Configuration of Twelve 16-bit Counters
Typical Current at 5V, 25C
ispLSI 1048C
80
0127A-48C-80-isp
ICC can be estimated for the ispLSI 1048C using the following equation:
ICC = 73 + (# of PTs * 0.23) + (# of nets * Max. freq * 0.010) where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max. freq = Highest Clock Frequency to the device
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of 2 GLB
loads on average exists. These values are for estimates only. Since the value of ICC is sensitive to operating
conditions and the program in the device, the actual ICC should be verified.
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