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参数资料
| 型号： | ISPLSI 1048E-50LQN |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 1/17页 |
| 文件大小： | 0K |
| 描述： | IC PLD ISP 96I/O 20NS 128PQFP |
| 标准包装： | 24 |
| 系列： | ispLSI® 1000E |
| 可编程类型： | 系统内可编程 |
| 最大延迟时间 tpd(1)： | 20.0ns |
| 电压电源 - 内部： | 4.75 V ~ 5.25 V |
| 逻辑元件/逻辑块数目： | 48 |
| 门数： | 8000 |
| 输入/输出数： | 96 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-BQFP |
| 供应商设备封装： | 128-PQFP（28x28） |
| 包装： | 托盘 |
| 其它名称： | ISPLSI1048E-50LQN |
ispLSI 1048E
In-System Programmable High Density PLD
1048e_12
1
USE
ispLSI
1048EA
FOR
NEW
DESIGNS
Lead-
Free
Package
Options
Available!
Functional Block Diagram
Features
HIGH DENSITY PROGRAMMABLE LOGIC
— 8,000 PLD Gates
— 96 I/O Pins, Twelve Dedicated Inputs
— 288 Registers
— High-Speed Global Interconnects
— Wide Input Gating for Fast Counters, State
Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic
— Functionally and Pin-out Compatible to ispLSI 1048C
HIGH PERFORMANCE E2CMOS TECHNOLOGY
—
fmax = 125 MHz Maximum Operating Frequency
—
tpd = 7.5 ns Propagation Delay
— TTL Compatible Inputs and Outputs
— Electrically Eraseable and Reprogrammable
— Non-Volatile
— 100% Tested at Time of Manufacture
IN-SYSTEM PROGRAMMABLE
— In-System Programmable (ISP) 5V Only
— Increased Manufacturing Yields, Reduced Time-to-
Market and Improved Product Quality
— Reprogram Soldered Devices for Faster Prototyping
OFFERS THE EASE OF USE AND FAST SYSTEM
SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY
OF FIELD PROGRAMMABLE GATE ARRAYS
— Complete Programmable Device Can Combine Glue
Logic and Structured Designs
— Enhanced Pin Locking Capability
— Four Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Programmable Output Slew Rate Control to
Minimize Switching Noise
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global
Interconnectivity
— Lead-Free Package Options
Output Routing Pool
F7 F6 F5 F4 F3 F2 F1 F0
B0 B1 B2 B3 B4 B5 B6 B7
A0
A1
A2
A3
A4
A5
A6
A7
Output
Routing
Pool
Output Routing Pool
CLK
E7 E6 E5 E4 E3 E2 E1 E0
C0 C1 C2 C3 C4 C5 C6 C7
D7
D6
D5
D4
D3
D2
D1
D0
Output
Routing
Pool
Logic
Array
DQ
Global Routing Pool (GRP)
GLB
0139G1A-isp
Description
The ispLSI 1048E is a High Density Programmable Logic
Device containing 288 Registers, 96 Universal I/O pins,
12 Dedicated Input pins, four Dedicated Clock Input pins,
two dedicated Global OE input pins, and a Global Routing
Pool (GRP). The GRP provides complete interconnectivity
between all of these elements. The ispLSI 1048E offers
5V non-volatile in-system programmability of the logic, as
well as the interconnect to provide truly reconfigurable
systems. A functional superset of the ispLSI 1048 archi-
tecture, the ispLSI 1048E device adds two new global
output enable pins and two additional dedicated inputs.
The basic unit of logic on the ispLSI 1048E device is the
Generic Logic Block (GLB). The GLBs are labeled A0,
A1…F7 (see Figure 1). There are a total of 48 GLBs in the
ispLSI 1048E device. Each GLB has 18 inputs, a pro-
grammable AND/OR/Exclusive OR array, and four outputs
which can be configured to be either combinatorial or
registered. Inputs to the GLB come from the GRP and
dedicated inputs. All of the GLB outputs are brought back
into the GRP so that they can be connected to the inputs
of any other GLB on the device.
Copyright 2006 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
August 2006
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ispLSI1048E-50LQN | 功能描述:CPLD - 复杂可编程逻辑器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ISPLSI1048E50LQNI | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
| ISPLSI1048E50LT | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
| ispLSI1048E-50LT | 功能描述:CPLD - 复杂可编程逻辑器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| ISPLSI1048E50LTI | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD |
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