
12
XMEGA A [MANUAL]
8077I–AVR–11/2012
These registers are available only on devices with external bus interface and/or more than 64KB of program or data
memory space. For these devices, only the number of bits required to address the whole program and data memory
space in the device is implemented in the registers.
3.10.1
RAMPX, RAMPY and RAMPZ registers
The RAMPX, RAMPY and RAMPZ registers are concatenated with the X-, Y-, and Z-registers, respectively, to enable
indirect addressing of the whole data memory space above 64KB and up to 16MB.
Figure 3-6.
The combined RAMPX + X, RAMPY + Y and RAMPZ + Z registers.
When reading (ELPM) and writing (SPM) program memory locations above the first 128KB of the program memory,
RAMPZ is concatenated with the Z-register to form the 24-bit address. LPM is not affected by the RAMPZ setting.
3.10.2 RAMPD register
This register is concatenated with the operand to enable direct addressing of the whole data memory space above 64KB.
Together, RAMPD and the operand will form a 24-bit address.
Figure 3-7.
The combined RAMPD + K register.
3.10.3 EIND - Extended Indirect register
EIND is concatenated with the Z-register to enable indirect jump and call to locations above the first 128KB (64K words)
of the program memory.
Figure 3-8.
The combined EIND + Z register.
3.11
Accessing 16-bit Registers
The AVR data bus is 8 bits wide, and so accessing 16-bit registers requires atomic operations. These registers must be
byte-accessed using two read or write operations. 16-bit registers are connected to the 8-bit bus and a temporary register
using a 16-bit bus.
Bit (Individually)
7
0
7
0
7
0
RAMPX
XH
XL
Bit (X-pointer)
23
16
15
8
7
0
Bit (Individually)
7
0
7
0
7
0
RAMPY
YH
YL
Bit (Y-pointer)
23
16
15
8
7
0
Bit (Individually)
7
0
7
0
7
0
RAMPZ
ZH
ZL
Bit (Z-pointer)
23
16
15
8
7
0
Bit (Individually)
7
0
15
0
RAMPD
K
Bit (D-pointer)
23
16
15
0
Bit (Individually)
7
0
7
0
7
0
EIND
ZH
ZL
Bit (D-pointer)
23
16
15
8
7
0