参数资料
型号: IXDE509PI
厂商: IXYS
文件页数: 12/14页
文件大小: 0K
描述: IC GATE DRIVER 9A 8-DIP
产品变化通告: Discontinuation Notice 15/Jun/2010
标准包装: 50
配置: 低端
输入类型: 反相
延迟时间: 18ns
电流 - 峰: 9A
配置数: 1
输出数: 1
电源电压: 4.5 V ~ 30 V
工作温度: -55°C ~ 125°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-DIP
包装: 管件
IXDD509 / IXDE509
Short Circuit di/dt Limit
APPLICATIONS INFORMATION
A short circuit in a high-power MOSFET module such as the
VM0580-02F, (580A, 200V), as shown in Figure 27, can cause
the current through the module to flow in excess of 1500A for
10 μ s or more prior to self-destruction due to thermal runaway.
For this reason, some protection circuitry is needed to turn off
the MOSFET module. However, if the module is switched off
too fast, there is a danger of voltage transients occuring on the
drain due to Ldi/dt, (where L represents total inductance in
series with drain). If these voltage transients exceed the
MOSFET's voltage rating, this can cause an avalanche break-
down.
The IXDD509 and IXDE509 have the unique capability to softly
switch off the high-power MOSFET module, significantly
reducing these Ldi/dt transients.
Thus, the IXDD509/IXDE509 help to prevent device destruction
from both dangers; over-current, and avalanche breakdown
due to di/dt induced over-voltage transients.
The IXDD509/IXDE509 are designed to not only provide ± 9A
under normal conditions, but also to allow their outputs to go
into a high impedance state. This permits the IXDD509/IXDE509
output to control a separate weak pull-down circuit during
detected overcurrent shutdown conditions to limit and sepa-
rately control d VGS /dt gate turnoff. This circuit is shown in Figure
34.
Referring to Figure 34, the protection circuitry should include
a comparator, whose positive input is connected to the source
of the VM0580-02. A low pass filter should be added to the input
by the inductance of the wire connecting the source resistor to
ground. (Those glitches might cause false triggering of the
comparator).
The comparator's output should be connected to a SRFF(Set
Reset Flip Flop). The flip-flop controls both the Enable signal,
and the low power MOSFET gate. Please note that CMOS 4000-
series devices operate with a V CC range from 3 to 15 VDC, (with
18 VDC being the maximum allowable limit).
A low power MOSFET, such as the 2N7000, in series with a
resistor, will enable the VMO580-02F gate voltage to drop
gradually. The resistor should be chosen so that the RC time
constant will be 100us, where "C" is the Miller capacitance of
the VMO580-02F.
For resuming normal operation, a Reset signal is needed at
the SRFF's input to enable the IXDD509/IXDE509 again. This
Reset can be generated by connecting a One Shot circuit
between the IXDD509/IXDE509 Input signal and the SRFF
restart input. The One Shot will create a pulse on the rise of the
IXDD509/IXDE509 input, and this pulse will reset the SRFF
outputs to normal operation.
When a short circuit occurs, the voltage drop across the low-
value, current-sensing resistor, (Rs=0.005 Ohm), connected
between the MOSFET Source and ground, increases. This
triggers the comparator at a preset level. The SRFF drives a low
input into the Enable pin disabling the IXDD509/IXDE509
output. The SRFF also turns on the low power MOSFET,
(2N7000).
of the comparator to eliminate any glitches in voltage caused
In this way, the high-power MOSFET module is softly turned off
by the IXDD509/IXDE509, preventing its destruction.
Figure 34 - Application Test Diagram
I XDD509/IXDE50 9
IXDD409
Ld
10uH
Rd
0.1ohm
+
-
VB
VCC
VCCA
Rg
High_Power
IN
EN
OUT
Rsh
1600ohm
1ohm
VMO580-02F
+
-
VCC
+
-
VIN
GND
GND
Rs
Low_Power
2N7002/PLP
One Shot Circuit
Rcomp
R+
10kohm
Ls
20nH
0
NOT1
CD4049A
Ros
1Mohm
Cos
1pF
NAND
CD4011A
NOT2
CD4049A
Q
R
5kohm
Ccomp
1pF
Comp
LM339
V+
V-
+
-
REF
+
-
C+
100pF
NOT3
CD4049A
NOR1
CD4001A
S
EN
NOR2
CD4001A
SR Flip-Flop
Copyright ? 2007 IXYS CORPORATION All rights reserved
12
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