- 您现在的位置：买卖IC网 > Datasheet目录466 > KAC-9627 (Eastman Kodak Company)IC SENSOR IMAGE VGA 48CLCC Datasheet资料下载
参数资料
| 型号： | KAC-9627 |
| 厂商： | Eastman Kodak Company |
| 文件页数： | 16/41页 |
| 文件大小： | 0K |
| 描述： | IC SENSOR IMAGE VGA 48CLCC |
| 标准包装： | 480 |
| 象素大小： | 7.5µm x 7.5µm |
| 有源象素阵列： | 648H x 488V |
| 每秒帧数： | 30 |
| 电源电压： | 3.3V |
| 类型： | CMOS 成像 |
| 封装/外壳： | 48-LCC |
| 供应商设备封装： | 48-LCC（14.22x14.22） |
| 包装： | 散装 |
| 请注意： | * |
| 其它名称： | LM9627 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页
IMAGE SENSOR SOLUTIONS
Functional Description (continued)
5.3 Clock Generation
The KAC-9627 contains a clock generation module (figure 21)
that will create three clocks as follows:
5.4 Full Frame Integration
Full frame integration is when each pixel in the array integrates
light incident on it for the duration of a frame (see Figure 22).
Hclk,
the horizontal clock. This is an internal system
clock and can be programmed to be the input
clock (mclk) or mclk divided by any number
between 1 and 31. All exposure times are in
multiples of this clock.
The number of Hclk clock cycles required to process & shift out
one row of pixels is given by:
RN Hclk = R opcycle + R delay
To set the frequency of this clock the HclkGen
bits in the VCLKGEN register should be pro-
gramed.For the new frequency to take effect the
UpdateSettings bit in the UPDATE register
should be set. The timing and control circuit will
set the new Hclk frequency at beginning of the
next frame and reset the UpdateSettings bit in
the UPDATE register.
Where:
R opcycle
R delay
is a fixed integer value of 780 representing the
Row Operation Cycle Time in multiples of Hclk
clock cycles. It is the time required to carry out
all fixed row operations outlined in Figure 20.
a programmable value between 0 & 2047 repre-
senting the Row Delay Time in multiples of Hclk .
This parameter allows the Row Operation Cycle
time to be extended. (See the Row Delay High
pclk
Aclk
the pixel clock. This is the external pixel clock
that appears at the digital video port. pclk is
always equal to Hclk except when the sensor is
programmed to work sub-sampling mode in
which case pclk will be equal to Hclk divided by
2. This clock cannot be programed.
the array clock. This is an internal clock used by
the pixel array.Its frequency does not effect the
exposure time.
To set the frequency of this clock the AclkGen
and Row Delay Low registers).
New R delay values only take effect at the begin-
ning of the first frame after the UpdateSettings
bit is set in the UPDATE register.
The number of rows in a scan window is given by:
SWN rows = (RAD end - RAD start ) + 1
Where:
bits in the VCLKGEN register should be pro-
gramed. For the new frequency to take effect the
UpdateSettings bit in the UPDATE register
should be set. The timing and control circuit will
set the new Hclk frequency at beginning of the
RAD end
RAD start
is the end row address of the defined scan win-
dow. (See section 2.0)
is the start row address of the defined scan win-
dow. (Scan section 2.0).
next frame and reset the UpdateSettings bit in
the UPDATE register.
The number of Hclk clocks required to process a full frame is
given by:
÷ HclkGen
Hclk
FN Hclk = [(M factor * SWN rows ) + F delay ] * RN Hclk
Where:
mclk
÷ ArrayMode
pclk
M factor
is a Mode Factor which must be applied. It is
dependent on the selected mode of operation as
shown in the table below:
÷ AclkGen Aclk
Figure 21. Clock Generation Module
Progressive Scan
Vertical Sub-sampling or
Interlace
1
0.5
SWN rows is the Number of Rows in Selected Scan Win-
dow .
F delay
a programmable value between 0 & 4096 repre-
Frame Rate = FN
senting the Inter Frame Delay in multiples of
RN Hclk . This parameter allows the frame time to
be extended. (See the Frame Delay High and
Frame Delay Low registers).
New F delay values only take effect at the begin-
ning of the first frame after the UpdateSettings
bit is set in the UPDATE register.
The frame rate is given by:
Hclk
Hclk
www.kodak.com/go/imagers 585-722-4385
16
Email:imagers@kodak.com
相关PDF资料 |
PDF描述 |
|---|---|
| KB-A100SRW | LIGHT BAR 660NM RED 8.89X3.81MM |
| KB-B100SRW | LIGHT BAR 660NM RED 19.05X3.81MM |
| KB-C100SRW | LIGHT BAR 660NM RED 8.89X8.89MM |
| KB-D100SRW | LIGHT BAR 660NM RED 8.89X3.81MM |
| KB-E100SRW | LIGHT BAR 660NM RED 8.89X3.81MM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| KAC-9627/HEADBOARD | 功能描述:HEADBOARD FOR KAC-9627 RoHS:是 类别:编程器，开发系统 >> 过时/停产零件编号 系列:- 标准包装:1 系列:- 传感器类型:CMOS 成像，彩色（RGB） 传感范围:WVGA 接口:I²C 灵敏度:60 fps 电源电压:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相关产品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| KAC-9628 | 功能描述:IC SENSOR IMAGE VGA COLOR 48CLCC RoHS:是 类别:传感器，转换器 >> 图像，相机 系列:- 标准包装:480 系列:- 象素大小:6.7µm x 6.7µm 有源象素阵列:768H x 488V 每秒帧数:52 电源电压:3.3V 类型:CMOS 成像 封装/外壳:48-QFP 供应商设备封装:48-QFP 包装:托盘 请注意:* 配用:4H2105-ND - HEADBOARD FOR KAC-004014H2104-ND - KIT EVAL FOR KAC-00401 其它名称:4H20954H2095-NDKAC-00401-CBC-LB-A0 |
| KAC-9628/HEADBOARD | 功能描述:HEADBOARD FOR KAC-9628 RoHS:是 类别:编程器，开发系统 >> 过时/停产零件编号 系列:- 标准包装:1 系列:- 传感器类型:CMOS 成像，彩色（RGB） 传感范围:WVGA 接口:I²C 灵敏度:60 fps 电源电压:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相关产品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| KAC-9628EVAL-KIT | 功能描述:KIT EVALUATION SENSOR KAC-9628 RoHS:是 类别:编程器，开发系统 >> 过时/停产零件编号 系列:- 标准包装:1 系列:- 传感器类型:CMOS 成像，彩色（RGB） 传感范围:WVGA 接口:I²C 灵敏度:60 fps 电源电压:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相关产品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| KAC-9630 | 功能描述:IC SENSOR IMAGE CMOS MONO 32CLCC RoHS:是 类别:传感器，转换器 >> 图像，相机 系列:- 标准包装:480 系列:- 象素大小:6.7µm x 6.7µm 有源象素阵列:768H x 488V 每秒帧数:52 电源电压:3.3V 类型:CMOS 成像 封装/外壳:48-QFP 供应商设备封装:48-QFP 包装:托盘 请注意:* 配用:4H2105-ND - HEADBOARD FOR KAC-004014H2104-ND - KIT EVAL FOR KAC-00401 其它名称:4H20954H2095-NDKAC-00401-CBC-LB-A0 |
发布紧急采购，3分钟左右您将得到回复。